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參數(shù)資料
| 型號： | HD49235FS |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processor for CD |
| 中文描述： | 數(shù)字信號處理器的CD |
| 文件頁數(shù)： | 12/41頁 |
| 文件大?。?/td> | 192K |
| 代理商： | HD49235FS |
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HD49235FS
Rev.2, Aug. 1995, page 12 of 41
Functional Description
Data Strobe
The main functions of this block are described below.
1. Generation of Basic Crystal Clock
XCI:
Is the inverter input pin for the crystal oscillator.
XCO:
Is the inverter output pin for the crystal oscillator.
A 33.8688-MHz crystal oscillator clock signal is generated at the XCI and XCO pins. Figure 1 shows
the standard external components when a 33.8688-MHz crystal is used.
2. Generation of Basic PLL Clock
PLLCK:
This is an output pin used for monitoring the VCO oscillator signal. When the PLL is in lock,
the frequency is 4.3218 MHz at standard speed, 8.6436 MHz at double speed, or 17.2872 MHz at
quadruple speed.
PDOUT1:
This is a phase detector output pin, for use in data strobing. This pin is in the high-
impedance state in the CLV stop mode. In other CLV modes, this pin outputs the result of phase
detection in a phase-locked loop formed with the VCO and the EFM signal input at the EFMI pin.
PDOUT2:
This is a phase detector output pin, for use in adjusting the free-running frequency of the
VCO. In CLV stop mode, this pin outputs a pulse-width modulated waveform equivalent to the phase
error in a phase-locked loop formed with the VCO and a crystal-oscillator-derived clock signal. In other
CLV modes, this pin maintains a pulse-width modulated output with the same duty cycle as in stop
mode.
AC:
Connect a capacitor for phase compensation of the amplifier.
AMPO:
Amplifier output pin.
AMPM:
Inverting input to the amplifier.
XCO
15 pF
15 pF
100 pF
1 M
XCI
3.3
μ
H
30
29
Figure 1 33.8688-MHz Crystal Oscillator Circuit
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