參數(shù)資料
型號(hào)： HCD40C4344R
廠商： Hitachi,Ltd.
英文描述： 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
中文描述： 4位HMCS400系列微電腦（4位單片微計(jì)算機(jī)）
文件頁(yè)數(shù)： 64/100頁(yè)
文件大?。?/td> 610K
代理商： HCD40C4344R
HD404344R Series/HD404394 Series
64
eight pulses of the transmit clock, the state changes to the transmit clock wait state for the external clock
mode (03). Also, the state changes to the STS wait state for the internal clock mode (13). In the internal
clock mode, the transmit clock stops after eight pulses of the transmit clock are output.
While in the transfer state, if the serial mode register (SMR: $005) (06, 16) is written to, the serial
interface is initialized and the state changes to the STS wait state.
After the transfer state has changed to another state, the octal counter is reset to 000 and the serial
interrupt request flag (IFS: $003, 2) is set.
Continuous clock output state (internal clock mode only): Continuous clock output state is the state in
which only the transmit clock from the
SCK
pin is output without data transfer. This can be done only
while in internal clock mode.
When the status of the 1 and 0 bits (PMRA1, PMRA0) of port mode register A (PMRA: $004) is 00
while in transmit clock wait state, the state can be changed to continuous clock output state by enabling
the transmit clock (17). By writing to the serial mode register (SMR: $005) while in continuous clock
output state (18), the state will change to the STS wait state.
STS wait state
(Octal counter = 000,
transmit clock disabled)
Transmit clock wait state
(Octal counter = 000)
Trans
fer
state
(Octal counter = 000)
MCU reset
SMR write
STS instruction
Transmit clock
8 transmit clocks 03 or STS instruction 05 (IFS 1)
SMR write (IFS 1)
External clock mode
STS wait state
(Octal counter = 000,
transmit clock disabled)
Transmit clock wait state
(Octal counter = 000)
Transfer state
(Octal counter = 000)
SMR write
STS instruction
Transmit clock
STS instruction 15 (IFS 1)
8 transmit clocks 13 or
SMR write (IFS 1) 16
Internal clock mode
Continuous clock output state
(PMRA 0, 1 = 0, 0)
SMR write
Note: Refer to the operating states section for the corresponding encircled numbers.
MCU reset
04
00
01
06
02
18
14
Transmit clock
17
11
12
10
Figure 42 Serial Interface State Transitions
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