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參數(shù)資料
| 型號(hào)： | HCD40C4344R |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī)) |
| 中文描述： | 4位HMCS400系列微電腦（4位單片微計(jì)算機(jī)） |
| 文件頁(yè)數(shù)： | 56/100頁(yè) |
| 文件大?。?/td> | 610K |
| 代理商： | HCD40C4344R |
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HD404344R Series/HD404394 Series
56
Timer counter C
(TCC)
÷
1
÷
2
Port mode
register A (PMRA)
Selector
÷
2
÷
4
÷
8
÷
3
÷
1
÷
5
System
clock
PER
Prescaler S (PSS)
3
Timer write
register C lower
(TWCL)
Timer mode
register C (TMC)
Timer write
register C upper
(TWCU)
Clock
Free-running/
reload timer
control
Timer read
register C lower
(TRCL)
Interrupt request
flag of timer C
(IFTC)
Timer read register CU (TRCU)
Overflow
TOC
Timer
output
control
Timer output
controller
Watchdog timer
controller
Watchdog on
flag (WDON)
System reset signal
I
Figure 33 Timer C Block Diagram
Timer C Operation
Free-running/reload timer operation: The selection of the free-running/reload timer, input clock source,
and prescaler division ratio is done by timer mode register C (TMC: $00D).
Timer C is initialized to the data, which is written to timer write register C (TWCL: $00E, TWCU:
$00F) by software. The data is then incremented in steps of 1 by using the input clock. If the clock input
is continued after timer C is set to $FF, an overflow occurs. Timer C then begins counting again, setting
the timer to the value in timer write register C (TWCL: $00E, TWCU: $00F) when the reload timer is
selected, or reset to $00 when the free-running timer is selected.
The timer C interrupt request flag is set by an overflow. Resetting the timer C interrupt request flag
(IFTC: $002, bit 2) is executed by either software or by an MCU reset.
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