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參數(shù)資料
| 型號(hào)： | HCD40C4344R |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī)) |
| 中文描述： | 4位HMCS400系列微電腦（4位單片微計(jì)算機(jī)） |
| 文件頁數(shù)： | 25/100頁 |
| 文件大小： | 610K |
| 代理商： | HCD40C4344R |
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HD404344R Series/HD404394 Series
25
Interrupts
There are five kinds of interrupts: external
INT
0
, timer B, timer C, serial interface, and A/D converter.
An interrupt request flag or an interrupt mask and vector address are used for each type of interrupt. They
are used for storing interrupt requests and interrupt controls. An interrupt enable flag is also used for total
interrupt control.
Interrupt Control Bits and Interrupt Processing:
The interrupt control bits are mapped from $000 to
$003 of RAM and can be accessed by RAM bit manipulation instructions. However, the interrupt request
flag (IF) cannot be set by software. An MCU reset initializes the interrupt enable flag (IE) and the interrupt
request flag (IF) to 0, and the interrupt mask (IM) to 1.
A block diagram of the interrupt control circuit is shown in figure 8. The interrupt priority order and vector
addresses are listed in a table in the figure, along with the conditions for executing the interrupt processing
of the five types of interrupt requests (table 2). An interrupt request occurs when the interrupt request flag
is set to 1 and the interrupt mask to 0. If the interrupt enable flag is 1, interrupt processing has occurred.
The vector address which corresponds to the interrupt source is generated from the priority PLA.
The interrupt processing sequence is shown in figure 9 and the interrupt processing flowchart is shown in
figure 10. After receiving an interrupt, the previous instruction is completed in the first cycle. The interrupt
enable flag (IE) is reset after two cycles. The contents of the carry flag, status flag, and program counter are
stored onto the stack at the second and third cycles. Instruction execution is restarted by jumping to the
vector address during the third cycle. The JMPL instructions, which branch to the start addresses of the
interrupt routines, should be programmed at each vector address area. The interrupt request which initiated
the interrupt processing should be reset by software instructions in the interrupt routine.
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