HB28E016/D032/D064/B128MM2
58
f the card detects a CRC error or a programming error (e.g. write protect violation, out of range, address
misalignment, internal error, etc.) during a multiple block write operation (both types) it will report the
failure in the data-response token and ignore any further incoming data blocks. The host must than abort
the operation by sending the ‘Stop Tran’ token.
f the host uses partial blocks whose accumulated length is not block aligned and block misalignment is not
allowed (CSD parameter WRITE_BLK_MISALIGN is not set), the card shall detect the block
misalignment error before the beginning of the first misaligned block and respond with an error indication
in the dataresponse token and ignore any further incoming data blocks. The host must than abort the
operation by sending the ‘Stop Tran’ token.
Once the programming operation is completed, the host must check the results of the programming using
the SEND_STATUS command (CMD13). Some errors (e.g. address out of range, write protect violation
etc.) are detected during programming only. The only validation check performed on the data block and
communicated to the host via the data-response token is the CRC.
f the host sends a ‘Stop Tran’ token after the card received the last block of a multiple block operation
with pre-defined number of blocks, it will be responded to as the beginning of an illegal command and
responded accordingly.
While the card is busy, resetting the CS signal will not terminate the programming process. The card will
release the DataOut line (tri-state) and continue with programming. If the card is reselected before the
programming is finished, the DataOut line will be forced back to low and all commands will be rejected.
Resetting a card (using CMD0) will terminate any pending or active programming operation. This may
destroy the data formats on the card. It is in the responsibility of the host to prevent it.