HB28E016/D032/D064/B128MM2
50
Last host command - next host command timing diagram
After the last command, which does not force a response, has been sent, the host can continue sending the
next command after at least N
CC
clock periods.
S T content CRC E Z * * * * * * Z
CMD
Host command
S T content CRC E
Host command
N
CC
cycles
Host active
Host active
Timing CMD
n
End to CMD
n+1
Start
(All Modes)
n the case the CMD
n
command was a last identification command (no more response sent by a card), then
the next CMD
n+1
command is allowed to follow after at least N
CC
+136 (the length of the R2 response)
clock periods.
Data access timing
Data transmission starts with the access time delay t
AC
(which corresponds to N
AC
), beginning from the end
bit of the data address command. The data transfer stops automatically in case of a data block transfer or
by a transfer stop command.
S T content CRC E Z Z P * * * P
CMD
DAT
Z Z Z
Z Z Z Z Z Z P
P S D D D * * *
* * * *
* * * * * * * * * * *
Host command
Read data
S T content CRC E
Response
N
CR
cycles
N
AC
cycles
Host active
Card active
Card active
Data Read Timing
(Data Transfer Mode)
Data transfer stop command timing
The card data transmission can be stopped using the stop command. The data transmission stops
immediately with the end bit of the stop command.
S T content CRC E Z Z P * * * P
CMD
DAT
D D D
D D D E Z
* * * * * * * *
Z * * * * * * * * * * * * * * * * * * * * * *
Host command
S T content CRC E
Response
N
CR
cycles
Host active
Card active
Card active
N
ST
Timing of Stop Command
(CMD12, Data Transfer Mode)