參數(shù)資料
型號(hào)： GS881Z32CGD-150IVT
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 256K X 32 ZBT SRAM, 7.5 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁(yè)數(shù)： 22/37頁(yè)
文件大?。?/td> 1239K
代理商： GS881Z32CGD-150IVT
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
1
RFU
011
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
1
RFU
110
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1. Instruction codes expressed in binary, MSB on left, LSB on right.
2. Default instruction automatically loaded at power-up and in test-logic-reset state.
GS881Z18/32/36C(T/D)-xxxV
Rev: 1.00a 10/2009
29/37
2008, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
相關(guān)PDF資料
PDF描述
GS881Z32CGD-150VT 256K X 32 ZBT SRAM, 7.5 ns, PBGA165
GS881Z36BGT-200T 256K X 36 ZBT SRAM, 6.5 ns, PQFP100
GS881Z36BGT-250IT 256K X 36 ZBT SRAM, 5.5 ns, PQFP100
GS88218AB-133 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88218AB-133I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
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GS881Z36AT-150I 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM
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