參數(shù)資料
型號(hào): GS880F36
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 8Mb(256K x 36Bit) Synchronous Burst SRAM(8M位(256K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 8MB的(256 × 36Bit)同步突發(fā)靜態(tài)存儲(chǔ)器(800萬位(256K × 36位)同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁數(shù): 9/22頁
文件大?。?/td> 310K
代理商: GS880F36
Rev: 1.06 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
9/22
2000, Giga Semconductor, Inc.
Preliminary
GS880F18/36T-11/11.5/12/14/18
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagramshows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition fromRead cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAMs drivers off and for incomng data to meet
Data Input Set Up Time.
3.
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