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參數(shù)資料
| 型號(hào)： | GS8642V18E-250 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 4M X 18 CACHE SRAM, 6.5 ns, PBGA165 |
| 封裝： | 17 X 15 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數(shù)： | 8/39頁 |
| 文件大小： | 1168K |
| 代理商： | GS8642V18E-250 |
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GS8642V18(B/E)/GS8642V36(B/E)/GS8642V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 9/2004
16/39
2004, GSI Technology
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8642ZV36GB-167IT | 2M X 36 ZBT SRAM, 8 ns, PBGA119 |
| GS864418GE-225IV | 4M X 18 CACHE SRAM, 6.5 ns, PBGA165 |
| GS8644V18GE-150 | 4M X 18 CACHE SRAM, 7.5 ns, PBGA165 |
| GS8662S36BD-300I | 2M X 36 STANDARD SRAM, 0.45 ns, PBGA165 |
| GS8662S36BGD-300 | 2M X 36 STANDARD SRAM, 0.45 ns, PBGA165 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8642V36GB-300 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 2MX36 5.5NS/2.3NS 119FBGA - Trays |
| GS8642V72C-167 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 8NS/3.5NS 209FBGA - Trays |
| GS8642V72C-167I | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 8NS/3.5NS 209FBGA - Trays |
| GS8642V72GC-200 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 7.5NS/3NS 209FBGA - Trays |
| GS8642V72GC-300 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 5.5NS/3NS 209FBGA - Trays |
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