參數(shù)資料
型號(hào): GS8642V18E-250
廠商: GSI TECHNOLOGY
元件分類(lèi): SRAM
英文描述: 4M X 18 CACHE SRAM, 6.5 ns, PBGA165
封裝: 17 X 15 MM, 1 MM PITCH, FBGA-165
文件頁(yè)數(shù): 21/39頁(yè)
文件大?。?/td> 1168K
代理商: GS8642V18E-250
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GS8642V18(B/E)/GS8642V36(B/E)/GS8642V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 9/2004
28/39
2004, GSI Technology
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents TBD for this part.
Instruction Register
ID Code Register
Boundary Scan Register
0
1
2
0
31 30 29
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
108
1
0
Control Signals
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8642V36GB-300 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 2MX36 5.5NS/2.3NS 119FBGA - Trays
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GS8642V72C-167I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 8NS/3.5NS 209FBGA - Trays
GS8642V72GC-200 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 7.5NS/3NS 209FBGA - Trays
GS8642V72GC-300 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 5.5NS/3NS 209FBGA - Trays