參數(shù)資料
型號: GS840E18GB-100T
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 256K X 18 CACHE SRAM, 12 ns, PBGA119
封裝: BGA-119
文件頁數(shù): 18/31頁
文件大小: 629K
代理商: GS840E18GB-100T
Rev: 2.05 6/2000
25/31
1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
.
GS840E18/32/36T/B-180/166/150/100
Application Tips
Single and Dual Cycle Deselect
SCD devices force the use of “dummy read cycles” (read cycles that are launched normally but that are ended with the output drivers inactive) in
a fully synchronous environment. Dummy read cycles waste performance but their use usually assures there will be no bus contention in
transitions from reads to writes or between banks of RAMs. DCD SRAMs do not waste bandwidth on dummy cycles and are logically simpler to
manage in a multiple bank application (wait states need not be inserted at bank address boundary crossings) but greater care must be exercised
to avoid excessive bus contention.
CK
ADSP
ADSC
tH
tKH tKL
tKC
tS
ZZ
tZZR
tZZH
tZZS
~ ~
Snooze
Sleep Mode Timing Diagram
相關(guān)PDF資料
PDF描述
GS840E18GB-180 256K X 18 CACHE SRAM, 8 ns, PBGA119
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GS8642V18E-250 4M X 18 CACHE SRAM, 6.5 ns, PBGA165
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS840E18T 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
GS840E18T-100 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
GS840E18T-100I 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
GS840E18T-150 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
GS840E18T-150I 制造商:GSI 制造商全稱:GSI Technology 功能描述:256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs