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參數(shù)資料
| 型號： | GS82032AGQ-133IT |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 64K X 32 CACHE SRAM, 10 ns, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 22/23頁 |
| 文件大小： | 677K |
| 代理商： | GS82032AGQ-133IT |
Rev: 1.09 7/2002
8/23
2000, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS82032AT/Q-180/166/133/100
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Simplified State Diagram with G
Notes:
1. The diagram shows supported (tested) synchronous state transitions, plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G high) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
3. Transitions shown in gray assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet Data
Input Set Up Time.
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PDF描述 |
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| GS8321EV18GE-133T | 2M X 18 CACHE SRAM, 8.5 ns, PBGA165 |
| GS8321ZV36E-150T | 1M X 36 ZBT SRAM, 8.5 ns, PBGA165 |
| GS832236AB-300T | 1M X 36 CACHE SRAM, PBGA119 |
| GS832472GC-150I | 512K X 72 CACHE SRAM, 10 ns, PBGA209 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS82032AGQ-150I | 制造商:GSI Technology 功能描述:2MB (64K X 32) SYNCH BURST SCD - Trays |
| GS82032AGQ-166 | 制造商:GSI Technology 功能描述:2MB (64K X 32) SYNCH BURST SCD - Trays |
| GS82032AGQ-166I | 制造商:GSI Technology 功能描述:2MB (64K X 32) SYNCH BURST SCD - Trays |
| GS82032AGQ-4 | 制造商:GSI Technology 功能描述:2MB (64K X 32) SYNCH BURST SCD - Trays |
| GS82032AGQ-4I | 制造商:GSI Technology 功能描述:2MB (64K X 32) SYNCH BURST SCD - Trays |
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