參數(shù)資料
型號(hào): GMS97L51
英文描述: 8-Bit CMOS Microcontrollers(高性?xún)r(jià)比的51單片機(jī),片內(nèi)4KEPROM,128字節(jié)RAM,低電壓)
中文描述: 8位CMOS微控制器(高性?xún)r(jià)比的51單片機(jī),片內(nèi)4KEPROM,128字節(jié)的RAM,低電壓)
文件頁(yè)數(shù): 24/59頁(yè)
文件大?。?/td> 812K
代理商: GMS97L51
Power Saving Modes
Two power down modes are available, the Idle Mode and Power Down Mode.
The bits PDE and IDLE of the register PCON select the Power Down mode or the Idle mode, respectively.
If the Power Down mode and the Idle mode are set at the same time, the Power Down mode takes
precedence.
Table 10
gives a general overview of the power saving modes.
Table 10
Power Saving Modes Overview
Mode
Entering
Instruction
Example
Leaving by
Remarks
Idle mode
ORL PCON, #01H
- Enabled interrupt
- Hardware Reset
CPU is gated off
CPU status registers maintain
their data.
Peripherals are active
Power-down Mode
ORL PCON, #02H
Hardware Reset
Oscillator is stopped, contents of
on-chip RAM and SFRs are
maintained (leaving Power Down
Mode means redefinition of SFR
contents).
In the Power Down mode of operation,
V
CC
can be reduced to minimize power consumption. It must be
ensured, however, that
V
CC
is not reduced before the Power Down Mode is invoked, and that
V
CC
is
restored to its normal operating level, before the Power Down mode is terminated. The reset signal that
terminates the Power Down Mode also restarts the oscillator. The reset should not be activated before
V
CC
is restored to its normal operating level and must be held active long enough to allow the oscillator to
restart and stabilize (similar to power-on reset).
GMS90 Series
8-Bit CMOS Microcontroller
LG Semicon MCU
24
MAY. 1998
相關(guān)PDF資料
PDF描述
GMS97L52 8-Bit CMOS Microcontrollers(高性?xún)r(jià)比的51單片機(jī),片內(nèi)8KEPROM,256字節(jié)RAM,低電壓)
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