參數(shù)資料
型號(hào): GMS97L51
英文描述: 8-Bit CMOS Microcontrollers(高性價(jià)比的51單片機(jī),片內(nèi)4KEPROM,128字節(jié)RAM,低電壓)
中文描述: 8位CMOS微控制器(高性價(jià)比的51單片機(jī),片內(nèi)4KEPROM,128字節(jié)的RAM,低電壓)
文件頁(yè)數(shù): 40/59頁(yè)
文件大小: 812K
代理商: GMS97L51
AC Characteristics for GMS90series (33MHz version)
External Data Memory Characteristics
Parameter
Symbol
Limit Values
Unit
33 MHz
Clock
Variable Clock
1/
t
CLCL
= 3.5 MHz to 33 MHz
min.
max.
min.
max.
RD pulse width
t
RLRH
132
-
6
t
CLCL
- 50
-
ns
WR pulse width
t
WLWH
132
-
6
t
CLCL
- 50
-
ns
Address hold after ALE
t
LLAX2
10
-
t
CLCL
- 20
-
ns
RD to valid data in
t
RLDV
-
81
-
5
t
CLCL
- 70
ns
Data hold after RD
t
RHDX
0
-
0
-
ns
Data float after RD
t
RHDZ
-
46
-
2
t
CLCL
- 15
ns
ALE to valid data in
t
LLDV
-
153
-
8
t
CLCL
- 90
ns
Address to valid data in
t
AVDV
-
183
-
9
t
CLCL
- 90
ns
ALE to WR or RD
t
LLWL
71
111
3
t
CLCL
- 20
3
t
CLCL
+ 20
ns
Address valid to WR or RD
t
AVWL
66
-
4
t
CLCL
- 55
-
ns
WR or RD high to ALE high
t
WHLH
10
40
t
CLCL
- 20
t
CLCL
+ 20
ns
Data valid to WR transition
t
QVWX
5
-
t
CLCL
- 25
-
ns
Data setup before WR
t
QVWH
142
-
7
t
CLCL
- 70
-
ns
Data hold after WR
t
WHQX
10
-
t
CLCL
- 20
-
ns
Address float after RD
t
RLAZ
-
0
-
0
ns
GMS90 Series
8-Bit CMOS Microcontroller
LG Semicon MCU
40
MAY. 1998
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