Special Function Registers
All registers, except the program counter and the four general purpose register banks, reside in the special
function register area.
The 27 special function registers (SFR) include pointers and registers that provide an interface between
the CPU and the other on-chip peripherals. There are also 128 directly addressable bits within the SFR
area.
All SFRs are listed in
table 1
,
table 2
, and
table 3.
In
table 1
they are organized in numeric order of their addresses. In
table 2
they are organized in groups
which refer to the functional blocks of the GMS90 series.
Table 3
illustrates the contents of the SFRs.
Table 1
Special Function Registers in Numeric Order of their Addresses
Address
Register
Contents
after Reset
Address
Register
Contents
after Reset
80
H
81
H
82
H
83
H
84
H
85
H
86
H
87
H
P0
1)
SP
DPL
DPH
reserved
reserved
reserved
PCON
FF
H
07
H
00
H
00
XX
H
XX
H2)
XX
H2)
0XXX000
B2)
98
H
99
H
9A
H
9B
H
9C
H
9D
H
9E
H
9F
H
SCON
1)
SBUF
reserved
reserved
reserved
reserved
reserved
reserved
00
XX
H
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
88
H
89
H
8A
H
8B
H
8C
H
8D
8E
HH
8F
H
TCON
1)
TMOD
TL0
TL1
TH0
TH1
F
3)
reserved
00
H
00
H
00
H
00
H
00
H
00
H
F
3)
XX
H2)
A0
H
A1
H
A2
H
A3
H
A4
H
A5
H
A6
H
A7
H
P2
1)
reserved
reserved
reserved
reserved
reserved
reserved
reserved
FF
XX
H
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
90
H
91
H
92
H
93
H
94
H
95
H
96
H
97
H
P1
1)
reserved
reserved
reserved
reserved
reserved
reserved
reserved
FF
H
00
XX
H
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
A8
H
A9
H
AA
H
AB
H
AC
H
AD
H
AE
H
AF
H
IE
1)
reserved
reserved
reserved
reserved
reserved
reserved
reserved
0X000000
B2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
XX
H2)
1)
: Bit-addressable Special Function Register.
2)
: X means that the value is indeterminate and the location is reserved.
3)
: The GMS9xC54/56/58 have the AUXR0 register at address 8E
H
.
GMS9xC51/52
GMS9xC54/56/58
8E
H
reserved
XX
H
2)
8E
H
AUXR0 1)
XXXXXXX0
B
2)
GMS90 Series
8-Bit CMOS Microcontroller
LG Semicon MCU
14
MAY. 1998