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參數(shù)資料
| 型號(hào)： | FXLA2203UMX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 0K |
| 描述： | TRANSLATOR LEVEL DUAL 24UMLP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 應(yīng)用： | 用戶標(biāo)識(shí)模塊（SIM） |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 封裝/外殼： | 24-UMLP |
| 供應(yīng)商設(shè)備封裝： | 24-UMLP |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FLXA2203 Rev. 1.0.5
13
FXLA2203
—
Dual-Mode,
Dual-SI
M-Card
Level
Translator
Operation Description
Table 5. Power Supply Pins
Pin
Name
Function
6
VCC
EN and CH_Swap Supply
7
VCC_H_1
Host 1 Supply
8
VCC_H_2
Host 2 Supply
9
VCC1
Power Switch 1 Input
10
VCC2
Power Switch 2 Input
The control pins EN and CH_Swap reference VCC. VCC
can range from 1.65V to 3.6V and is independent from
the other four power pins; however, VCC must always be
higher or equal to VCC1 and VCC2.
VCC_Host_1 and VCC_Host_2 can independently
range from 1.65V to 3.6V and are the power supply pins
for their respective host-side interfaces; including RST,
I/O, and CLK.
VCC1 and VCC2 can independently range from 1.65V
to 3.6V and are the inputs to the internal power
switches. VCC1 and VCC2 should be connected to
external PMIC LDOs. Depending on the logic state of
the CH_Swap and EN control pins, the external LDOs
are routed through the two power switches to either
VCC_Card1 or VCC_Card2 (see Table 6). Meanwhile,
CH_Swap also routes the host (1 or 2) signal pins; RST,
I/O, and CLK to the SIM Slot side (1 or 2). See section
“SIM Slot Signals: Active vs. 3-State” for details.
The
voltage reference of each SIM slot is determined by the
LDO voltage assigned to that SIM slot.
RST and CLK are unidirectional pins always going in the
SIM slot direction. I/O is a bi-directional, open drain pin.
Internal 10K
Ω pull-up resistors are provided.
The ISO7816 standard identifies an algorithm that
allows a Host device to auto-detect the operating
voltage of a SIM card. The algorithm is called “class
selection” and the FXLA2203 is 100% transparent to
class selection.
If VCC1 and VCC_H_1 share the same voltage
potential; these two pins can be tied together. Likewise,
if VCC2 and VCC_H_2 share the same voltage
potential, these two pins can be tied together. Under
these conditions, and once CH_Swap has been
established, the host can power up or down the SIM
card along with the FXLA2203 host side solely by the
LDO voltage. This feature is a convenient method for
conserving power. Note that VCC must always remain
equal to or greater than VCC1 and VCC2.
The FXLA2203 I/O pins must be driven by open-drain
drivers on the host sides and the card sides.
SIM Slot Power Switch Truth Table
If EN=1 and
CH_Swap=1; then the VCC of SIM Slot 1
(VCC_Card_1) tracks the VCC1 voltage (ext. LDO),
while the VCC of SIM Slot 2 (VCC_Card_2) tracks the
VCC2 voltage (ext. LDO). If EN=1 and
CH_Swap=0;
then the VCC of SIM Slot 1 (VCC_Card_1) tracks the
VCC2 voltage (ext. LDO), while the VCC of SIM Slot 2
(VCC_Card_2) tracks the VCC1 voltage (ext. LDO). See
Table 7.
Note that VCC must be > VCC1 and VCC2.
SIM Slot Signal Truth Table
If EN=1 and CH_Swap=1, the Host 1 Input signal pins
(CLK_H_1, RST_H_1, and I/O_H_1) are translated to
the SIM Slot 1 output signal pins (CLK_1, RST_1, and
I/O_1). The VCC1 voltage (ext. LDO) sets the voltage
levels of CLK_1, RST_1, and I/O_1. Host 2 input signal
pins (CLK_H_2, RST_H_2, and I/O_H_2) are translated
to the SIM Slot 2 output signal pins (CLK_2, RST_2,
and I/O_2). The VCC2 (ext. LDO) voltage sets the
voltage levels of CLK_2, RST_2 and I/O_2.
If EN=1 and CH_Swap=0, the Host 1 input signal pins
(CLK_H_1, RST_H_1 and I/O_H_1) is translated to the
SIM Slot 2 output signal pins (CLK_2, RST_2, and
I/O_2). The VCC1 voltage (ext. LDO) sets the voltage
levels of CLK_2, RST_2, and I/O_2. Host 2 input signal
pins (CLK_H_2, RST_H_2, and I/O_H_2) are translated
to the SIM Slot 1 output signal pins (CLK_1, RST_1,
and I/O_1). The VCC2 (ext. LDO) voltage sets the
voltage levels of CLK_1, RST_1, and I/O_1.
Table 6. Power Switch Truth Table
VCC1
VCC2
EN
CH_Swap
VCC_Card 1
VCC_Card 2
0V – 3.6V
1
VCC1
VCC2
0V – 3.6V
1
0
VCC2
VCC1
Table 7. Signal Truth Table
EN
CH_Swap
SIM SLOT 1
SIM Slot 2
1
CLK_H_1, RST_H_1, and I/O_H_1
CLK_H_2, RST_H_2, and I/O_H_2
1
0
CLK_H_2, RST_H_2, and I/O_H_2
CLK_H_1, RST_H_1, and I/O_H_1
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