參數(shù)資料
型號: FXLA2203UMX
廠商: Fairchild Semiconductor
文件頁數(shù): 10/16頁
文件大?。?/td> 0K
描述: TRANSLATOR LEVEL DUAL 24UMLP
標準包裝: 5,000
應用: 用戶標識模塊(SIM)
電源電壓: 1.65 V ~ 3.6 V
封裝/外殼: 24-UMLP
供應商設備封裝: 24-UMLP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXLA2203 Rev. 1.0.5
3
FXLA2203
Dual-Mode,
Dual-SI
M-Card
Level
Translator
Pin Configuration
Figure 2. Top Through View
Figure 3. Bottom View
Pin Definitions
Pin #
Name
Signal
Description
1
NC
No Connection
2
VCC1
I
Power Supply 1 Input: Coming from PMIC 1 LDO
3
VCC_Card1
O
Power Output for Card Slot 1
4
GND
Ground
5
VCC_Card2
O
Power Output for Card Slot 2
6
VCC2
I
Power Supply 2 Input: Coming from PMIC 2 LDO
7
RST_2
O
Reset Output to Card Slot 2
8
I/O_2
I/O
Data I/O for Card Slot 2; Open Drain
9
CLK_2
O
Clock Output to Card Slot 2
10
CLK_H_2
I
Clock Input of Host Interface 2
11
RST_H_2
I
Reset Input of Host Interface 2
12
I/O_H_2
I
Data I/O of Host Interface 2; Open Drain
13
VCC_H_2
Supply
Power Supply of Host Interface 2
14
GND
Ground
15
VCC
Supply
Power Supply of Control Pins: EN and CH_Swap
16
EN
I
GPIO Enable. LOW disables both SIM card slots. HIGH enables both SIM
card slots. Connect to VCC if not used. Default level after power up is LOW.
17
Ch_Swap
I
Channel Swap. “1” host 1 to card slot 1, host 2 to card slot 2. “0” host 1 to
card slot 2, host 2 to card slot 1. Connected to VCC if not used. Default level
after power up is LOW.
18
VCC_H_1
Supply
Power Supply of Host Interface 1
19
I/O_H_1
I/O
Data I/O of Host Interface 1; Open Drain
20
RST_H_1
I
Reset Input of Host Interface 1
21
CLK_H_1
I
Clock Input of Host Interface 1
22
CLK_1
O
Clock Output to Card Slot 1
23
I/O_1
I/O
Data I/O for Card Slot 1; Open Drain
24
RST_1
O
Reset Output to Card Slot 1
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