參數(shù)資料
型號： FW322
英文描述： 1394A PCI PHY/Link Open Host Controller Interface
中文描述： 1394A端口物理層的PCI /鏈接開放主機控制器接口
文件頁數(shù)： 33/148頁
文件大?。?/td> 1723K
代理商： FW322
Lucent Technologies Inc.
33
Data Sheet, Rev. 1
February 2001
FW322
1394A PCI PHY/Link Open Host Controller Interface
Internal Registers
(continued)
MIN_GNT and MAX_LAT Register
The MIN_GNT and MAX_LAT register is used to communicate to the system the desired setting of the latency
timer register. If a serial ROM is detected, then the contents of this register are loaded through the serial ROM
interface after a PCI reset. If no serial ROM is detected, then this register returns a default value that corresponds
to the MIN_GNT = 0C, MAX_LAT = 18.
Table 21. MIN_GNT and MAX_LAT Register
Register:
Type:
Offset:
Default:
MIN_GNT and MAX_LAT register
Read/Update
3Eh
180C
Table 22. MIN_GNT and MAX_LAT Register Description
Bit
Field
Name
MAX_LAT
Type
Default
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
RU
0
0
0
1
1
0
0
0
0
0
0
0
1
1
0
0
MIN_GNT
Bit
15:8
Field Name
MAX_LAT
Type
RU
Description
Maximum Latency.
The contents of this register may be used by host
BIOS to assign an arbitration priority level to the FW322. The default
for this register indicates that the FW322 may need to access the PCI
bus as often as every 0.25
μ
s; thus, an extremely high priority level is
requested. The contents of this field may also be loaded through the
serial ROM.
Minimum Grant.
The contents of this register may be used by host
BIOS to assign a latency timer register value to the FW322. The
default for this register indicates that the FW322 may need to sustain
burst transfers for nearly 64
μ
s, thus requesting a large value be
programmed in the FW322 latency timer register.
7:0
MIN_GNT
RU
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