FPD1050
0.75W
P
OWER P
HEMT
Phone:
+1 408 850-5790
Fax:
+1 408 850-5766
http://
www.filcs.com
Revised:
8/05/04
Email:
sales@filcsi.com
FEATURES
28.5 dBm Linear Output Power at 12 GHz
11 dB Power Gain at 12 GHz
14 dB Maximum Stable Gain at 12 GHz
41 dBm Output IP3
45% Power-Added Efficiency
DESCRIPTION AND APPLICATIONS
The FPD1050 is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT),
featuring a 0.25
μ
m by 1050
μ
m Schottky barrier gate, defined by high-resolution stepper-based
photolithography. The recessed and offset Gate structure minimizes parasitics to optimize
performance. The epitaxial structure and processing have been optimized for reliable high-power
applications. The FPD750 also features Si
3
N
4
passivation and is also available in a low cost plastic
SOT89 plastic package.
Typical applications include commercial and other narrowband and broadband high-performance
amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output
amplifiers, and medium-haul digital radio transmitters.
ELECTRICAL SPECIFICATIONS AT 22°C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
RF SPECIFICATIONS MEASURED AT
f
= 12 GHz USING CW SIGNAL
Power at 1dB Gain Compression
P
1dB
Maximum Stable Gain (S
21
/S
12
)
MSG
Power Gain at P
1dB
G
1dB
Power-Added Efficiency
PAE
V
DS
= 8 V; I
DS
= 50% I
DSS
V
DS
= 8 V; I
DS
= 50% I
DSS
V
DS
= 8 V; I
DS
= 50% I
DSS
V
DS
= 8 V; I
DS
= 50% I
DSS
;
P
OUT
= P
1dB
V
DS
= 10V; I
DS
= 50% I
DSS
Matched for optimal power
Tuned for best IP3
27.5
10.0
28.5
14.0
11.0
45
dBm
dB
dB
%
Output Third-Order Intercept Point
(from 15 to 5 dB below P
1dB
)
IP3
39
41
dBm
Saturated Drain-Source Current
Maximum Drain-Source Current
I
DSS
I
MAX
G
M
I
GSO
|V
P
|
|V
BDGS
|
|V
BDGD
|
θ
JC
V
DS
= 1.3 V; V
GS
= 0 V
V
DS
= 1.3 V; V
GS
+1 V
V
DS
= 1.3 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 1.3 V; I
DS
= 1 mA
I
GS
= 1 mA
I
GD
= 1 mA
V
DS
> 6V
250
315
520
375
mA
mA
Transconductance
Gate-Source Leakage Current
280
15
mS
μ
A
V
V
V
°
C/W
Pinch-Off Voltage
Gate-Source Breakdown Voltage
Gate-Drain Breakdown Voltage
1.0
18
18
16
16
Thermal Resistivity (see Notes)
45
DRAIN
BOND
PAD (2X)
SOURCE
BOND
PAD (2x)
GATE
BOND
PAD (1X)
DIE SIZE: 470 x 440
μ
m
DIE THICKNESS: 100
μ
m
BONDING PADS: >85 x 60
μ
m