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參數(shù)資料
| 型號： | FMS9874AKGC140 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 封裝： | MQFP-100 |
| 文件頁數(shù)： | 9/26頁 |
| 文件大?。?/td> | 454K |
| 代理商： | FMS9874AKGC140 |
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FMS9874A
PRODUCT SPECIFICATION
REV. 1.2.10 1/14/02
17
After each byte is read, the pointer auto-increments to allow
multiple data byte transfers within one read cycle.
Preceding each slave write, there must be a start cycle.
Following the pointer byte there should be a stop cycle.
After the last read, there must be a stop cycle comprising
a LOW-to-HIGH transition of SDA while SCL is HIGH.
(see Figure 18, right waveform)
A repeated start signal occurs when the master device driv-
ing the serial interface generates a start signal without rst
generating a stop signal to terminate the current communica-
tion. This is used to change the mode of communication
(read, write) between the slave and master without releasing
the serial interface lines.
Serial Interface Read/Write Examples
Examples below show how serial bus cycles can be linked
together for multiple register read and write access cycles.
For sequential register accesses, each ACK handshake ini-
tiates further SCL clock cycles from the master to transfer
the next data byte.
Write to one register
1.
Start signal
2.
Slave Address byte (R/W bit = LOW)
3.
Pointer byte
4.
Data byte to base address
5.
Stop signal
Write to four consecutive registers
1.
Start signal
2.
Slave Address byte (R/W bit = LOW)
3.
Pointer byte
4.
Data byte to base address
5.
Data byte to (base address + 1)
6.
Data byte to (base address + 2)
7.
Data byte to (base address + 3)
8.
Stop signal
Read from one register
1.
Start signal
2.
Slave Address byte (R/W bit = LOW)
3.
Pointer byte (= base address)
4.
Stop signal (optional)
5.
Start signal
6.
Slave Address byte (R/W bit = HIGH)
7.
Data byte from base address
8.
Stop signal
Read from four registers
1.
Start signal
2.
Slave Address byte (R/W bit = LOW)
3.
Pointer byte (= base address)
4.
Stop signal (optional)
5.
Start signal
6.
Slave Address byte (R/W bit = HIGH)
7.
Data byte from base address
8.
Data byte from (base address + 1)
9.
Data byte from (base address + 2)
10. Data byte from (base address + 3)
11. Stop signal
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| FMS9875KGC100 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FMS9875KGC100X | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FMS9875KGC140 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FMS9875KGC140X | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| FN3410-10-44 | 500 V, 50 HZ, THREE PHASE EMI FILTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS9874KGC | 功能描述:視頻 IC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| FMS9874KGC100 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Graphics Digitizer - 3x8-Bit, 108Ms/s Triple Video A/D Converter with Clamps |
| FMS9875 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL |
| FMS9875KAC100 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL |
| FMS9875KAC140 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL |
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