參數(shù)資料
型號(hào)： FMS9874AKGC140
廠(chǎng)商： FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi)： ADC
英文描述： 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
封裝： MQFP-100
文件頁(yè)數(shù)： 16/26頁(yè)
文件大?。?/td> 454K
代理商： FMS9874AKGC140
FMS9874A
PRODUCT SPECIFICATION
REV. 1.2.10 1/14/02
23
Printed Wiring Board Design Guidelines
Recommended strategy is to mount the FMS9874A over a
ground plane with carefully routed analog inputs and digital
outputs. All connections should be treated as transmission
lines to ensure that reections due to mismatches are mini-
mized and ground return currents do not interfere with critical
signals.
Analog Inputs
Recommendations:
1.
Keep analog trace lengths short to minimize crosstalk.
2.
Terminate analog inputs with 75
resistors, placed
close to the FMS9874A analog inputs, RIN, GIN and
BIN. By matching transmission line impedances,
reections will be minimized.
3.
Layout traces as 75
transmission lines.
4.
Avoid running analog traces near digital traces. Due to
the wide input bandwidth (500MHz) digital noise can
easily leak into analog inputs or cause excessive PLL
jitter.
5.
If necessary, limit bandwidth by adding a ferrite bead in
series with each RGB input as shown in Figure 25. A
Fair-Rite #2508051217Z0 is recommended. Alternatively,
bandwidth reduction using a shunt 10pF capacitor may
reduce snow (intensity noise) caused by HF noise riding
on the RGB input. Mismatches, reections and noise
may cause ringing or distortion of the incoming video
signals.
6.
Locate the PLL lter clear of other signals.
7.
Bypass the reference with a 0.1F capacitor to ground.
Figure 25. RGB Input Filter Option
Digital I/O
Recommendations:
1.
Route digital I/O signals clear of analog inputs.
2.
Terminate clock lines to reduce reections. Treat clock
lines as transmission lines.
3.
Scale the HSIN input to 3.3V, using a resistor network
or a series 1 k
resistor.
4.
Limit Serial Port input voltages applied to SDA and
SDL inputs with 150
resistors connected directly to
the pins.
5.
If necessary terminate the HSIN input with 330/220
.
6.
If necessary, to reduce reections, EMI or spikes add a
50–200
resistor at each data output pin.
7.
To minimize noise within the FMS9874A, restrict the
capacitive load at the digital outputs to < 10pF.
Power and Ground
A schematic of the recommended power distribution is
shown in Figure 26. Note that:
1.
Analog and digital circuits are layed out over a common
solid ground plane.
2.
Each FMS9874A pin is decoupled with a 0.1F capaci-
tor.
3.
A group of pins may be de-coupled through a common
capacitor if no pin is more than 5 mm from the capacitor.
4.
A separate regulated supply is used for the phase-locked
loop power supply, VDDP.
5.
Capacitors are attached to each PLL pin or pin-pair.
RIN, GIN, BIN
R,G, B INPUT
R1
75
L1
BEAD
C1
47nF
C2
10pF
相關(guān)PDF資料
PDF描述
FMS9875KGC100 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
FMS9875KGC100X 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
FMS9875KGC140 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
FMS9875KGC140X 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
FN3410-10-44 500 V, 50 HZ, THREE PHASE EMI FILTER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FMS9874KGC 功能描述:視頻 IC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
FMS9874KGC100 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Graphics Digitizer - 3x8-Bit, 108Ms/s Triple Video A/D Converter with Clamps
FMS9875 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL
FMS9875KAC100 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL
FMS9875KAC140 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Triple 8-Bit, 108/140 MHz A/D Converter with Clamps and PLL
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