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參數(shù)資料
| 型號： | FLEX10KE |
| 廠商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family |
| 中文描述： | 嵌入式可編程邏輯系列 |
| 文件頁數(shù)： | 6/114頁 |
| 文件大?。?/td> | 1422K |
| 代理商： | FLEX10KE |
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Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
FLEX 10K devices are configured at system power-up with data stored in
an Altera serial Configuration EPROM device or provided by a system
controller. Altera offers the EPC1 and EPC1441 Configuration EPROMs,
which configure FLEX 10K devices via a serial data stream. Configuration
data can also be downloaded from system RAM or from Alteras
BitBlaster
a
serial download cable, ByteBlaster
a
parallel port download
cable, or ByteBlasterMV
a
parallel port download cable. After a FLEX 10K
device has been configured, it can be reconfigured in-circuit by resetting
the device and loading new data. Because reconfiguration requires less
than 320 ms, real-time changes can be made during system operation.
FLEX 10K devices contain an optimized interface that permits
microprocessors to configure FLEX 10K devices serially or in parallel, and
synchronously or asynchronously. The interface also enables
microprocessors to treat a FLEX 10K device as memory and configure the
device by writing to a virtual memory location, making it very easy for the
designer to reconfigure the device.
f
Go to the
Configuration EPROMs for FLEX Devices Data Sheet, BitBlaster
Serial Download Cable Data Sheet
,
ByteBlaster Parallel Port Download Cable
Data Sheet
,
ByteBlasterMV Parallel Port Download Cable Data Sheet
, and
AN 59 (Configuring FLEX 10K Devices)
for more information.
FLEX 10K devices are supported by Alteras MAX+PLUS II development
system, a single, integrated package that offers schematic, textincluding
AHDLand waveform design entry; compilation and logic synthesis; full
simulation and worst-case timing analysis; and device configuration. The
MAX+PLUS II software provides EDIF 2 0 0 and 3 0 0, LPM, VHDL,
Verilog HDL, and other interfaces for additional design entry and
simulation support from other industry-standard PC- and UNIX
workstation-based EDA tools.
The MAX+PLUS II software interfaces easily with common gate array
EDA tools for synthesis and simulation. For example, the MAX+PLUS II
software can generate Verilog HDL files for simulation with tools such as
Cadence Verilog-XL. Additionally, the MAX+PLUS II software contains
EDA libraries that use device-specific features such as carry chains, which
are used for fast counter and arithmetic functions. For instance, the
Synopsys Design Compiler library supplied with the MAX+PLUS II
development system includes DesignWare functions that are optimized
for the FLEX 10K architecture.
The MAX+PLUS II software runs on 486- and Pentium-based PCs, and
Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC System/6000
workstations.
f
Go to the
MAX+PLUS II Programmable Logic Development System &
Software Data Sheet
in this data book for more information.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FLEX110 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Multibus Pack RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| FLEX111 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Fasttrack suite RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| FLEX112 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Demo2 Pack RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| FLEX113 | 功能描述:開發(fā)板和工具包 - 無線 Mini Kit RoHS:否 制造商:Arduino 產(chǎn)品:Evaluation Boards 工具用于評估:AT32UC3L 核心:AVR32 頻率: 接口類型:USB 工作電源電壓:5 V |
| FLEX114 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Demo2 suite RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
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