參數(shù)資料
型號： FC106
廠商： Sanyo Electric Co.,Ltd.
英文描述： NPN Epitaxial Planar Silicon Composite Transistor Switching Applications
中文描述： 瑞展復(fù)合硅晶體管的開關(guān)應(yīng)用
文件頁數(shù)： 21/32頁
文件大?。?/td> 210K
代理商： FC106
FC106
Revision 1.2
21/32
September 98
6.2
Receive interface timing
6.2.1 Receive clock timing and latency
Figure 6.2
Receive clock timing
Table 6.2
Receive clock timing characteristics
Parameter
Description
Min
Typ
Max
Units
Trbc0
RBC[0] frequency
1
RBC[1] frequency
1
RBC skew
Receive clock rise and falltime
(10pF load)
1.
Exact frequency of RBC(0,1) depends upon thereceived data frequency. During byte align-
ment, the frequency of clocks RBC[0]and RBC[1] mayvary by less than 1% of the specified
typical value. The clocks are guaranteed to be glitch free.
53.125
MHz
Trbc1
53.125
MHz
Trbc_skew
RBC[0,1] Tr, Tf
8.9
-
-
2.5
9.9
-
ns
ns
RBC[1]
Trbc_skew
RBC[0]
Trbc0
1.4V
1.4V
bit 0 of serial
data
TX+
Trbc1
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