參數(shù)資料
型號: FC106
廠商: 意法半導體
英文描述: Fibre Channel Transceiver 1.0625 GBaud
中文描述: 光纖通道收發(fā)器1.0625 GBaud
文件頁數(shù): 15/32頁
文件大?。?/td> 210K
代理商: FC106
FC106
Revision 1.2
15/32
September 98
3.14 Self-test
The self-test block generates its own internal clock (the frequency of which can be digitally
tuned through the JTAG port), and pseudo-random patterns. This data is encoded,
serialized, deserialized (through the loop-back test path, or through an external connection
between TX+/TX- and RX+/RX-) and decoded. The recovered data is checked; the errors
and the number of transmitted bytes are internally counted. The contents of these counters
are accessible through the JTAG path. This block is activated by the AT signal.
In normal operation, AT is tied to V
dd
and the self-test block is disabled.
During production tests, AT is forced to V
ss
, allowing full speed dynamic tests, even at wafer
level.
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