參數(shù)資料
型號(hào): FBL2033BB
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 3.3V BTL 8-bit latched/registered/pass-thru universal transceiver
中文描述: FBL SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQFP52
文件頁(yè)數(shù): 6/14頁(yè)
文件大?。?/td> 150K
代理商: FBL2033BB
Philips Semiconductors
Product specification
FBL2033
3.3V BTL 8-bit latched/registered/pass-thru
universal transceiver
1999 Apr 15
6
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
COMMERCIAL LIMITS
V
CC
= 3.3V
±
10%;
T
amb
= –40 to +85
°
C
TYP
3.3
UNIT
MIN
3.0
2.0
1.62
MAX
3.6
V
CC
Supply voltage
V
V
V
IH
High-level input voltage
High-level in ut voltage
Except B0–B7
B0 – B7
Except B0–B7
B0 – B7
1.55
V
IL
Low-level input voltage
Low-level in ut voltage
0.8
1.47
-18
-12
+12
100
7
+70
V
I
IK
I
OH
Input clamp current
High-level output current
mA
mA
mA
AO0 – AO7
AO0 – AO7
B0 – B7
I
OL
Low-level output current
Low-level out ut current
C
OB
T
amb
Output capacitance on B port
Operating free-air temperature range
6
pF
°
C
0
LIVE INSERTION SPECIFICATIONS
SYMBOL
PARAMETER
LIMITS
TYP
UNIT
MIN
MAX
V
BIASV
Bias pin voltage
Voltage difference between the Bias voltage
and V
CC
after the PCB is plugged in.
V
CC
= 0 V, Bias V = 3.6V
V
CC
= 3.3V, Bias V = 3.6V
B0 – B7 = 0V, Bias V = 3.3V
B0 – B7 = 2V, Bias V = 1.3 to 2.5V
B0 – B7 = 1V, Bias V = 3 to 3.6V
V
= 0 to 3.3V, B0 – B7 = 0 to 2.0V,
Bias V = 2.7 to 3.6V, OEB0 = 0.8V, t
r
= 2ns
V
CC
= 0 to 3.3V, OEB0 = 0.8V
V
CC
= 0 to 1.2V, OEB0 = 0 to 5V
V
CC
= 3.3V
0.5
V
I
BIASV
Bias pin (I
) input
BIASV
DC current
1.2
10
2.1
1
mA
μ
A
V
μ
A
μ
A
V
Bn
I
LM
I
HM
Bus voltage during prebias
Fall current during prebias
Rise current during prebias
Peak bus current during
insertion
1.62
-1
I
Bn
PEAK
10
mA
I
OL
OFF
Power up current
100
100
μ
A
t
GR
Input glitch rejection
1.0
1.35
ns
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