參數(shù)資料
型號: FAN9612MX
廠商: Fairchild Semiconductor
文件頁數(shù): 26/36頁
文件大?。?/td> 1561K
描述: IC CTLR PFC DUAL BCM 16SOICN
標(biāo)準(zhǔn)包裝: 1
模式: 臨界傳導(dǎo)(BCM)
頻率 - 開關(guān): 16.5kHz ~ 525kHz
電流 - 啟動(dòng): 80µA
電源電壓: 9 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: FAN9612MXFSDKR
 
?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN9612 " Rev. 1.1.7
26
Step 16
: Gate Resistors
It is recommended to place at least a 15 ? resistor
between each of the gate drive outputs (DRV1, DRV2)
and their corresponding power devices. The gate drive
resistors have a beneficial effect to limit the current
drawn from the V
DD
 bypass capacitor during the turn-on
of the power MOSFETs and to attenuate any potential
oscillation in the gate drive circuits.
A
1.0
VDD
R
R
MAX
G2
G1
=
=
 
(29)
where 1.0 A is the recommended peak value of the
gate drive current.
 
Figure 34. Recommended Gate Drive Schematic
A speed-up discharge diode that feeds switching current
back into the IC is not recommended.
 
Figure 35. Discharge Diode is Not Recommended
In cases where it is desirable to control the MOSFET
turn-on and turn-off transition times independently, the
circuit of Figure 36 can be used. 
 
Figure 36. Gate Drive Schematic with Independent
Turn-On and Turn-Off
The   FAN9612   sources   high   peak   current   to   the
MOSFET gate through R
G
 and D
ON
, where R
G
 is used to
control the turn-on transition time. When the MOSFET is
commanded to turn off, Q
OFF
 conducts, shorting the gate
to   the   source,   where   the   turn-off   speed   can   be
controlled by the value of R
OFF
. Where maximum turn-
off time is desired, the value of R
OFF
 can be 0 &. D
ON
 
serves the dual purpose of protecting the Q
OFF
  base-
emitter junction and blocking the MOSFET discharge
current from sinking back through the FAN9612.
In addition to the high-speed turn-off, another advantage
of this circuit is that the FAN9612 does not have to sink
the high peak discharge current from the MOSFET,
reducing the internal power dissipation in the gate drive
circuitry by a factor of two. Instead, the current is
discharged locally in a tighter, more controlled loop,
minimizing parasitic trace inductance while protecting the
FAN9612 from injected disturbances associated with
ground bounce and ringing due to high-speed turn-off.
 
Step 17
: Current-Sense Resistors
PK
L,
CS2
CS1
I
0.18V
R
R
=
=
 
(30)
where 0.18 V is the worst-case threshold of the current
limit comparator. The size and type of current sense
resistors   depends   on   their   power   dissipation   and
manufacturing considerations.
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>

?/DIV>
?/DIV>
?/DIV>
=
OUT
OFF
LINE,
CS1
2
L,PK
RCS1
V
?/DIV>
9
V
2
4
6
1
R
I
1.5
P
 
(31)
where the 1.5 factor is used for the worst-case effect of
the current-limit threshold variation. When the current-
sense resistor is determined, the minimum current-
sense threshold must be used to avoid activating over-
current protection too early as the power supply
approaches full-load condition. The worst-case power
dissipation of the current sense resistor occurs when
the current-sense threshold is at its maximum value
defined   in   the   datasheet.   The   ratio   between   the
minimum and maximum thresholds squared (since the
square of the current determines power dissipation)
yields exactly the 1.5 factor used in the calculation.
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