參數(shù)資料
型號： FAN9612MX
廠商： Fairchild Semiconductor
文件頁數(shù)： 24/36頁
文件大?。?/td> 1561K
描述： IC CTLR PFC DUAL BCM 16SOICN
標準包裝： 1
模式： 臨界傳導（BCM）
頻率 - 開關： 16.5kHz ~ 525kHz
電流 - 啟動： 80µA
電源電壓： 9 V ~ 18 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 16-SOIC N
包裝： 標準包裝
其它名稱： FAN9612MXFSDKR
 
?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN9612 " Rev. 1.1.7
24
Step 4
: Output Capacitance
OUT,RIPPLE
OUT
LINE,MIN
OUT
)
OUT(RIPPLE
V
V
f
4
P
C
?/DIV>
?/DIV>
?/DIV>
=
 
(7)
2
OUT,MIN
2
OUT,RIPPLE
OUT
HOLD
OUT
OUT(HOLD)
V
2
V
V
t
P
2
C

?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>

?/DIV>
?/DIV>
=
(8)
The output capacitance must be calculated by two
different methods. The first equation determines the
capacitor value based on the allowable ripple voltage at
the minimum line frequency. It is important to remember
that the scaled version of this ripple is present at the FB
pin. The feedback voltage is continuously monitored by
the   non-latching   over   voltage   protection   circuit.   Its
threshold is about 8% higher the nominal output voltage.
To avoid triggering the OVP protection during normal
operation, V
OUT,RIPPLE
 should be limited to less 12% of
the nominal output voltage, V
OUT
.
The second expression yields the minimum output
capacitance based on the required hold-up time based
on the power supply specification. Ultimately, the larger
of the two values satisfies both design requirements and
has to be selected for C
OUT
.
Step 5
: Boost Inductance per Channel
CH
MAX,
OUT
MIN
SW,
OFF
LINE,
OUT
2
OFF
LINE,
OFF
LINE,
P
V
f
2
V
2
V
V
?/DIV>
L
?/DIV>
?/DIV>
?/DIV>
?/DIV>

?/DIV>
?/DIV>
=
(9)
CH
MAX,
OUT
SW,MIN
LINE,MAX
OUT
2
LINE,MAX
LINE,MAX
P
V
f
2
V
2
V
V
?/DIV>
L
?/DIV>
?/DIV>
?/DIV>
?/DIV>

?/DIV>
?/DIV>
=
(10)
The minimum switching frequency can occur either at
the   lowest   or   at   the   highest   input   line   voltage.
Accordingly, two boost inductor values are calculated
and the lower of the two inductances must be selected.
This L value keeps the minimum operating frequency
above f
SW,MIN
 under all operating conditions.
Step 6
: Maximum On-Time per Channel
2
OFF
LINE,
CH
MAX,
MAX
ON,
V
?/DIV>
P
L
2
t
?/DIV>
?/DIV>
?/DIV>
=
 
(11)
Step 7
: Peak Inductor Current per Channel
ON,MAX
OFF
LINE,
L,PK
t
L
V
2
I
?/DIV>
?/DIV>
=
 
(12)
Step 8
: Maximum DC Output Current
OUT
CH
MAX,
OUT,MAX
V
P
2
I
?/DIV>
=
 
(13)
 
Step 9
: Zero Current Detect Resistors
0.5mA
N
V
0.5
R
R
OUT
ZCD2
ZCD1
?/DIV>
?/DIV>
=
=
 
(14)
where 0.5?/SPAN>V
OUT
  is the maximum amplitude of the
resonant waveform across the boost inductor during
zero current detection; N is the turns ratio of the boost
inductor and the auxiliary winding utilized for the zero
current detection; and 0.5 mA is the maximum current
of the ZCD pin during the zero current detection period.
Step 10
: Maximum On-Time Setting
Resistor
MAX
ON,
6
MOT
t
10
4340
R
?/DIV>
?/DIV>
=
 
(15)
where R
MOT
 should be between 40 k?and 130 k?
Step 11
: Output Voltage Setting Resistors
(Feedback)
FB
FB
OUT
FB2
I
3V
P
V
3V
R
=
?/DIV>
=
 
(16)
where 3 V is the reference voltage of the error amplifier
at its non-inverting input and P
FB
 or I
FB
 are selected by
the designer. If the power loss associated to the
feedback divider is critical to meet stand-by power
consumption regulations, it might be beneficial to start
the calculation by choosing P
FB
. Otherwise, the current
of feedback divider, I
FB
 should be set to approximately
0.4 mA at the desired output voltage set point. This
value ensures that parasitic circuit board and pin
capacitances do not introduce unwanted filtering effect
in the feedback path.
If the feedback divider is used to provide startup power
for the FAN9612 (see  AN-6086  for  implementation 
details
), the following equation is used to calculate R
FB2
:
(
)
OUT
ON
LINE,
FB2
V
0.12mA
0.7V
3
12.5V
V
2
3V
R
?/DIV>
?/DIV>
+

?/DIV>
?/DIV>
=
 
(17)
where 3 V is the reference voltage of the error amplifier
at its non-inverting input; 12.5 V is the controllers
UVLO turn-on threshold; 0.12 mA is the worst-case
startup current required to start operation; and 3?/SPAN>0.7 V
accounts for the forward voltage drop of three diodes in
series of the startup current. Once the value of R
FB2
 is
determined, R
FB1
is given by the following formula:
FB2
OUT
FB1
R
1
3V
V
R
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>

=
 
(18)
R
FB1
 can be implemented as a series combination of two
or three resistors; depending on safety regulations,
maximum voltage, and or power rating of the selected
resistor type.
 
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