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參數(shù)資料
| 型號： | FAN9611MX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 9/35頁 |
| 文件大?。?/td> | 1556K |
| 描述： | IC PFC CTLR DUAL BCM 16-SOIC |
| 標準包裝： | 1 |
| 系列： | Sync-Lock™ |
| 模式： | 臨界傳導（BCM） |
| 頻率 - 開關： | 16.5kHz ~ 525kHz |
| 電流 - 啟動： | 80µA |
| 電源電壓： | 9 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC |
| 包裝： | 標準包裝 |
| 其它名稱： | FAN9611MXFSDKR |
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?2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN9611 " Rev. 1.1.7
9
2. Interleaving
The FAN9611 control IC is configured to control two
boost converters connected in parallel, both operated in
boundary conduction mode. In this arrangement, the
input and output voltages of the two parallel converters
are the same and each converter is designed to process
approximately half the total output power.
Figure 8. Interleaved PFC Boost Operation
Parallel power processing is penalized by the increased
number of power components, but offers significant
benefits to keep current and thermal stresses under
control and to increase the power handling capability of
the otherwise limited BCM PFC control solution.
Furthermore, the switches of the two boost converters
can be operated 180 degrees out of phase from each
other. The control of parallel converters operating 180
degrees out of phase is called interleaving. Interleaving
provides considerable ripple current reduction at the
input and output terminals of the power supply, which
favorably affects the input EMI filter requirements and
reduces the high-frequency RMS current of the power
supply output capacitor.
There is an obvious difficulty in interleaving two BCM
boost converters. Since the converters operating
frequency is influenced by component tolerances in the
power stage and in the controller, the two converters
operate at different frequencies. Therefore special
attention must be paid to ensure that the two converters
are locked to 180-degree out-of-phase operation.
Consequently, synchronization is a critical function of an
interleaved boundary conduction mode PFC controller.
It is implemented in the FAN9611 using proprietary and
dedicated circuitry called Sync-Lock" interleaving
technology.
3. Voltage Regulation, Voltage Mode Control
The power supplys output voltage is regulated by a
negative feedback loop and a pulse width modulator.
The negative feedback is provided by an error amplifier
that compares the feedback signal at the inverting input
to a reference voltage connected to the non-inverting
input of the amplifier. Similar to other PFC applications,
the error amplifier is compensated with high DC gain for
accurate voltage regulation, but very low bandwidth to
suppress line frequency ripple present across the output
capacitor of the converter. The line frequency ripple is
the result of the constant output power of the converter
and the fact that the input power is the product of a
sinusoidal current and a sinusoidal voltage thus follows
a sine square function. Eliminating the line frequency
component from the feedback system is imperative to
maintain low total harmonic distortion (THD) in the input
current waveform.
The pulse width modulator implements voltage mode
control. This control method compares an artificial ramp
to the output of the error amplifier to determine the
desired on-time of the converters power transistor to
achieve output voltage regulation.
Figure 9. PWM Operation
In FAN9611, there are two PWM sections
corresponding to the two parallel power stages. For
proper interleaved operation, two independent 180-
degree out-of-phase ramps are needed; which
necessitates the two pulse width modulators. To ensure
that the two converters process the same amount of
power, the artificial ramps have the same slope and use
the same control signal generated by the error amplifier.
4. Input-Voltage Feedforward
Basic voltage-mode control, as described in the
previous section, provides satisfactory regulation
performance in most cases. One important
characteristic of the technique is that input voltage
variation to the converter requires a corrective action
from the error amplifier to maintain the output at the
desired voltage. When the error amplifier has adequate
bandwidth, as in most DC-DC applications, it is able to
maintain regulation within a tolerable output voltage
range during input voltage changes.
On the other hand, when voltage-mode control is used
in power factor corrector applications; the error amplifier
bandwidth, and its capability to quickly react to input
voltage changes, is severely limited. In these cases, the
input voltage variation can cause excessive overshoot
or droop at the converter output as the input voltage
goes up or down.
To overcome this shortcoming of the voltage-mode
PWM circuit in PFC applications, input-voltage
feedforward is often employed. It can be shown
mathematically that a PWM ramp proportional to the
square of the input voltage rejects the effect of input
voltage variations on the output voltage and eliminates
the need of any correction by the error amplifier.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FAN9612 | 制造商:Fairchild 功能描述:INTERLEAVED PFC IC |
| FAN9612M | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FAN9612MX | 功能描述:功率因數(shù)校正 IC Interleaved Dual BCM PFC Controller RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| FAN9612Y FAN9613Y WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FAN9613_YAC3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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