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參數(shù)資料
| 型號： | EVAL-ADF4118EBZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADF4118 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，頻率合成器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADF4118 |
| 主要屬性： | 單路整數(shù)-N PLL |
| 次要屬性： | 1.96GHz WCDMA 圖形用戶界面 |
| 已供物品： | 板，纜線，CD |
| 相關(guān)產(chǎn)品： | ADF4118BRUZ-RL7TR-ND - IC PLL RF FREQ SYNTHESZR 16TSSOP ADF4118BRUZ-RL-ND - IC PLL RF FREQ SYNTHESZR 16TSSOP ADF4118BRUZ-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP ADF4118BRU-REEL7-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP ADF4118BRU-ND - IC SYNTH PLL RF 3.0GHZ 16-TSSOP |
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ADF4116/ADF4117/ADF4118
Rev. D | Page 12 of 28
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The reference input stage is shown in Figure 25. SW1 and SW2
are normally closed switches; SW3 is normally open. When
power-down is initiated, SW3 is closed and SW1 and SW2 are
opened. This ensures that there is no loading of the REFIN pin
on power-down.
TO R COUNTER
REFIN
100k
NC
SW2
SW3
NO
NC
SW1
POWER-DOWN
CONTROL
BUFFER
00
39
2-
02
5
Figure 25. Reference Input Stage
RF INPUT STAGE
The RF input stage is shown in Figure 26. It is followed by a
2-stage limiting amplifier to generate the CML clock levels
needed for the prescaler.
AVDD
AGND
500
1.6V
BIAS
GENERATOR
RFINA
RFINB
00
39
2-
0
26
Figure 26. RF Input Stage
PRESCALER (P/P + 1)
The dual-modulus prescaler (P/P + 1), along with the A counter
and B counter, enables the large division ratio, N, to be realized
(N = PB + A). The dual-modulus prescaler takes the CML clock
from the RF input stage and divides it down to a manageable
frequency for the CMOS A counter and CMOS B counter. The
prescaler is programmable. It can be set in software to 8/9 for the
ADF4116 and to 32/33 for the ADF4117 and ADF4118. It is based
on a synchronous 4/5 core.
A COUNTER AND B COUNTER
The A CMOS counter and B CMOS counter combine with the
dual-modulus prescaler to allow a wide ranging division ratio in
the PLL feedback counter. The counters are specified to work
when the prescaler output is 200 MHz or less.
Pulse Swallow Function
The A counter and B counter, in conjunction with the dual-
modulus prescaler, make it possible to generate output
frequencies that are spaced only by the reference frequency
divided by R. The equation for the VCO frequency is as follows:
(
)
[
]
R
f
A
B
P
f
REFIN
VCO
/
×
+
×
=
where:
fVCO is the output frequency of external voltage controlled
oscillator (VCO).
P is the preset modulus of dual-modulus prescaler.
B is the preset divide ratio of binary 13-bit counter (3 to 8191).
A is the preset divide ratio of binary 5-bit swallow counter (0 to 31).
fREFIN is the output frequency of the external reference frequency
oscillator.
R is the preset divide ratio of binary 14-bit programmable
reference counter (1 to 16,383).
R COUNTER
The 14-bit R counter allows the input reference frequency to be
divided down to produce the input clock to the phase frequency
detector (PFD). Division ratios from 1 to 16,383 are allowed.
13-BIT
B COUNTER
5-BIT
A COUNTER
PRESCALER
P/P + 1
FROM RF
INPUT STAGE
MODULUS
CONTROL
N = BP + A
LOAD
TO PFD
0
039
2-
0
27
Figure 27. A Counter and B Counter
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADF4118EBZ11 | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| EVAL-ADF411XEB1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board For PLL Frequency Synthesizer |
| EVAL-ADF411XEBZ1 | 功能描述:BOARD EVAL FOR ADF411X NO CHIP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| EVAL-ADF411XEBZ11 | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| EVAL-ADF4150EB1Z | 制造商:Analog Devices 功能描述:EVAL BOARD PLL SYNTH/VCO ADF4150 制造商:Analog Devices 功能描述:ADF4150, PLL SYNTHESIZER, EVAL BOARD 制造商:Analog Devices 功能描述:ADF4150, PLL SYNTHESIZER, EVAL BOARD; Silicon Manufacturer:Analog Devices; Kit Application Type:Clock & Timing; Application Sub Type:VCO; Features:Fractional-N Synthesizer and Integer-N Synthesizer, 3-wire Serial Interface; SVHC:No ;RoHS Compliant: Yes |
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