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參數(shù)資料
| 型號(hào)： | EVAL-AD7923CB2 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 200 kSPS, 12-Bit ADC with Sequencer in 16-Lead TSSOP |
| 中文描述： | 4通道，200 kSPS的，12位序列ADC的16引腳TSSOP |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 430K |
| 代理商： | EVAL-AD7923CB2 |
–16–
AD7923
REV. 0
INVALID DATA
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
DIN LINE HIGH FOR FIRST DUMMY CONVERSION
DATA IN TO CONTROL REGISTER
TO KEEP THE PART IN NORMAL MODE, LOAD
PM1 = PM0 = 1 IN CONTROL REGISTER
1
14
16
1
14
16
t
12
ALLOW
t
POWER
TO ELAPSE
IF IN SHUTDOWN AT POWER-ON,
PART BEGINS TO POWER UP ON
CS
RISING EDGE AS PM1 = PM0 = 1
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
Figure 14a. Placing AD7923 into Normal Mode after Supplies are First Applied
INVALID DATA
1
14
16
PART ENTERS SHUTDOWN ON
CS
RISING EDGE AS PM1 = PM0 = 0
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
DATA IN TO CONTROL REGISTER
CONTROL REGISTER IS LOADED ON
THE FIRST 12 CLOCKS. PM1 = 1, PM0 = 0
Figure 14b. Placing AD7923 into Full Shutdown Mode after Supplies are First Applied
INVALID DATA
INVALID DATA
DIN LINE HIGH FOR FIRST DUMMY CONVERSION
DATA IN TO CONTROL REGISTER
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS. PM1 = 0, PM0 = 1
1
14
16
1
14
16
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
PART ENTERS AUTO SHUTDOWN ON
CS
RISING EDGE AS PM1 = 0, PM0 = 1
Figure 14c. Placing AD7923 into Auto Shutdown Mode after Supplies are First Applied
POWER VERSUS THROUGHPUT RATE
In Auto Shutdown Mode, the average power consumption of
the ADC may be reduced at any given throughput rate. The
power saving will depend on the SCLK frequency used, i.e.,
conversion time. In some cases where the conversion time is a
large proportion of the cycle time, the throughput rate would
need to be reduced to take advantage of the power-down modes.
Assuming a 20 MHz SCLK is used, the conversion time is 800 ns,
but the cycle time is 5
m
s when the sampling rate is at a maxi-
mum of 200 kSPS. If the AD7923 is placed into shutdown for
the remainder of the cycle time, then on average far less power
will be consumed in every cycle compared to leaving the device
in Normal Mode. Furthermore, Figure 15 shows how, as the
throughput rate is reduced, the part remains in its shutdown
longer and the average power consumption drops accordingly
over time.
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