參數(shù)資料
型號(hào)： EVAL-AD1937AZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/36頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD1937
標(biāo)準(zhǔn)包裝： 1
主要目的： 音頻編解碼器
已用 IC / 零件： AD1937
主要屬性： 24 位，192 kHz，4 ADC: 107dB 動(dòng)態(tài)范圍，8 DAC: 112dB 動(dòng)態(tài)范圍
次要屬性： 分時(shí)復(fù)用（TDM）、I2C 和 SPI 接口，Popguard? 技術(shù)
已供物品： 板
AD1937
Rev. B | Page 20 of 36
TIME-DIVISION MULTIPLEXED (TDM) MODES
The serial ports of the AD1937 have several different TDM
serial data modes. Single-line TDM mode is the most com-
monly used configuration (see Figure 16 and Figure 17).
These figures show 8-channel configuration; other possible
options are 4- and 16-channel configurations. In Figure 16,
the eight on-chip DAC data slots are packed into one I2S
TDM stream. In this mode, both DBCLK and ABCLK are
256 fS. In Figure 17, the ADC serial port outputs one data
stream consisting of four on-chip ADCs followed by four
unused slots.
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 3
LEFT 2
SLOT 4
RIGHT 2
MSB
MSB – 1
MSB – 2
DATA
BCLK
LRCLK
SLOT 5
LEFT 3
SLOT 6
RIGHT 3
SLOT 7
LEFT 4
SLOT 8
RIGHT 4
DLRCLK
DBCLK
DSDATA
256 BCLKs
32 BCLKs
07
41
4-
01
4
Figure 16. Single-Line TDM Mode 8-Channel DAC Configuration
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 3
LEFT 2
SLOT 4
RIGHT 2
MSB
MSB – 1
MSB – 2
DATA
BCLK
LRCLK
SLOT 5 SLOT 6 SLOT 7 SLOT 8
ALRCLK
ABCLK
ASDATA
256 BCLKs
32 BCLKs
0741
4-
013
Figure 17. Single-Line TDM Mode 8-Channel ADC Configuration
The I/O pin functions of the serial ports are defined according
to the serial mode that is selected. For a detailed description of
the function of each pin in TDM and TDM/AUX modes, see
The AD1937 allows systems with more than eight DAC channels
to be easily configured by the use of an auxiliary serial data port.
The TDM/AUX mode 16-channel configuration is shown in
Figure 18. In this mode, the AUX channels are the last four
slots of the TDM data stream. These slots are extracted and
output to the AUX serial port. It should be noted that due to
the high DBCLK frequency, this mode is available only in the
48 kHz/44.1 kHz/32 kHz sample rates. An 8-channel DAC
configuration cannot be TDM/AUX because there are no
extra data slots for the AUX packets; this would be single-
line TDM mode.
The AD1937 also allows system configurations with more
than four ADC channels as shown in Figure 19 (using 8 ADCs)
and Figure 20 (using 16 ADCs). Due to the high ABCLK
frequency, this mode is available only in the 48 kHz/44.1 kHz/
32 kHz sample rates.
Combining the TDM/AUX ADC and DAC modes results in
a system configuration of 8 ADCs and 12 DACs. The system,
then consists of two external stereo ADCs, two external stereo
DACs, and one AD1937. This mode is shown in Figure 21
(combined TDM/AUX DAC and ADC modes).
In the TDM/AUX mode, the frame sync (ALRCLK) triggers
the TDM word by crossing the high frequency TDM BCLK
(ABCLK) to 0, similar to the single-line TDM modes (see
Figure 16 and Figure 17). The AUX LRCLK (DLRCLK) runs at
the much slower fS of the AUX port; the AUX BCLK (DBCLK)
runs at 64 × fS. This is shown in the TDM/AUX figures (see
Table 18. Pin Function Changes in TDM and TDM/AUX Modes
Mnemonic
Stereo Modes
TDM Modes
TDM/AUX Modes
ASDATA1
ADC1 data out
TDM ADC data out
TDM data out
ASDATA2
ADC2 data out
TDM ADC data in
AUX DAC1 data out (to external DAC1)
DSDATA1
DAC1 data in
TDM DAC data in
TDM data in
DSDATA2
DAC2 data in
TDM DAC data out
AUX ADC1 data in (from external ADC1)
DSDATA3
DAC3 data in
TDM DAC2 data in (dual-line mode)
AUX ADC2 data in (from external ADC2)
DSDATA4
DAC4 data in
TDM DAC2 data out (dual-line mode)
AUX DAC2 data out (to external DAC2)
ALRCLK
ADC LRCLK in/out
TDM ADC frame sync in/out
TDM frame sync in/out
ABCLK
ADC BCLK in/out
TDM ADC BCLK in/out
TDM BCLK in/out
DLRCLK
DAC LRCLK in/out
TDM DAC frame sync in/out
AUX LRCLK in/out
DBCLK
DAC BCLK in/out
TDM DAC BCLK in/out
AUX BCLK in/out
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-AD1937EB 制造商:AD 制造商全稱:Analog Devices 功能描述:4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC
EVAL-AD1937EBZ 制造商:Analog Devices 功能描述:EB SINGLE CHIP CODEC 4 ADC'S W/DIFF OUTP - Boxed Product (Development Kits)
EVAL-AD1938AZ 功能描述:BOARD EVAL FOR AD1938 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源
EVAL-AD1938EB 制造商:AD 制造商全稱:Analog Devices 功能描述:4 ADC/8 DAC with PLL, 192 kHz, 24-Bit CODEC
EVAL-AD1938EBZ 制造商:Analog Devices 功能描述:EVAL BD FOR MULTI CHANNEL 96KHZ CODEC - Boxed Product (Development Kits)
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