參數(shù)資料
型號: EPM9320A
廠商: Altera Corporation
英文描述: Programmable Logic Device Family(MAX9000可編程邏輯系列器件)
中文描述: 可編程邏輯器件系列(MAX9000可編程邏輯系列器件)
文件頁數(shù): 5/41頁
文件大小: 604K
代理商: EPM9320A
Altera Corporation
5
MAX 9000 Programmable Logic Device Family Data Sheet
The MAX 9000 family is supported by Altera’s MAX+PLUS II
development system, a single, integrated software package that offers
schematic, text—including VHDL, Verilog HDL, and the Altera
Hardware Description Language (AHDL)—and waveform design entry,
compilation and logic synthesis, simulation and timing analysis, and
device programming. The MAX+PLUS II software provides EDIF 2 0 0
and 3 0 0, LPM, and other interfaces for additional design entry and
simulation support from other industry-standard PC- and UNIX-
workstation-based EDA tools. The MAX+PLUS II software runs on
Windows-based PCs as well as Sun SPARCstation, HP 9000 Series
700/800, and IBM RISC System/6000 workstations.
f
For more information on development tools, see the
Programmable Logic Development System & Software Data Sheet
.
MAX+PLUS II
Functional
Description
MAX 9000 devices use a third-generation MAX architecture that yields
both high performance and a high degree of utilization for most
applications. The MAX 9000 architecture includes the following elements:
I
I
I
I
I
I
Logic array blocks
Macrocells
Expander product terms (shareable and parallel)
FastTrack Interconnect
Dedicated inputs
I/O cells
Figure 1
shows a block diagram of the MAX 9000 architecture.
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