
26
Altera Corporation
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Table 13. MAX 7000B Device DC Operating Conditions
Note (4)
Symbol
Parameter
Conditions
Min
Max
Unit
V
IH
High-level input voltage for 3.3 V
TTL/CMOS and 2.5 V TTL/CMOS
1.7
3.9
V
High-level input voltage for 1.8 V
TTL/CMOS
0.65
VCCIO
–0.5
2.25
V
V
IL
Low-level input voltage for 3.3 V
TTL/CMOS, 2.5 V TTL/CMOS, and
PCI compliance
0.8
V
Low-level input voltage for 1.8 V
TTL/CMOS
–0.5
0.35
VCCIO
V
OH
3.3-V high-level TTL output voltage I
OH
= –8 mA DC, V
CCIO
= 3.00 V
(5)
3.3-V high-level CMOS output
voltage
2.4
V
V
I
OH
= –0.1 mA DC, V
CCIO
= 3.00 V
(5)
V
CCIO
–
0.2
2.1
2.0
1.7
1.2
2.5-V high-level output voltage
I
OH
= –100 μA DC, V
CCIO
= 2.30 V
(5)
I
OH
= –1 mA DC, V
CCIO
= 2.30 V
(5)
I
OH
= –2 mA DC, V
CCIO
= 2.30 V
(5)
I
OH
= –2 mA DC, V
CCIO
=1.65 V
(5)
I
OL
= 8 mA DC, V
CCIO
= 3.00 V
(6)
I
OL
= 0.1 mA DC, V
CCIO
= 3.00 V
(6)
V
V
V
V
V
V
1.8-V high-level output voltage
V
OL
3.3-V low-level TTL output voltage
0.4
0.2
3.3-V low-level CMOS output
voltage
2.5-V low-level output voltage
I
OL
= 100 μA DC, V
CCIO
= 2.30 V
(6)
0.2
V
I
OL
= 1 mA DC, V
CCIO
= 2.30 V
(6)
I
OL
= 2 mA DC, V
CCIO
= 2.30 V
(6)
I
OL
= 2 mA DC, V
CCIO
= 1.7 V
(6)
V
I
= V
CCINT
or ground
V
O
= V
CCINT
or ground
V
CCIO
= 1.7 to 3.6 V
(7)
0.4
0.7
0.4
5
5
74
V
V
V
μA
μA
k
1.8-V low-level output voltage
I
I
I
OZ
R
ISP
Input leakage current
–5
–5
20
Tri-state output off-state current
Value of I/O pin pull-up resistor
during in-system programming or
during power-up
Table 14. MAX 7000B Device Capacitance
Note (8)
Symbol
Parameter
Conditions
Min
Max
Unit
C
IN
C
I/O
Input pin capacitance
V
IN
= 0 V, f = 1.0 MHz
V
OUT
= 0 V, f = 1.0 MHz
8
8
pF
pF
I/O pin capacitance