參數(shù)資料
型號(hào): EPF8820AQC208-4
廠商: Altera
文件頁(yè)數(shù): 11/62頁(yè)
文件大小: 0K
描述: IC FLEX 8000A FPGA 8K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 72
系列: FLEX 8000
LAB/CLB數(shù): 84
邏輯元件/單元數(shù): 672
輸入/輸出數(shù): 152
門(mén)數(shù): 8000
電源電壓: 4.75 V ~ 5.25 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
產(chǎn)品目錄頁(yè)面: 602 (CN2011-ZH PDF)
其它名稱(chēng): 544-2264
Altera Corporation
19
FLEX 8000 Programmable Logic Device Family Data Sheet
FL
EX
800
0
3
Figure 10. FLEX 8000 IOE
Numbers in parentheses are for EPF81500A devices only.
Row-to-IOE Connections
Figure 11 illustrates the connection between row interconnect channels
and IOEs. An input signal from an IOE can drive two separate row
channels. When an IOE is used as an output, the signal is driven by an
n-to-1 multiplexer that selects the row channels. The size of the
multiplexer varies with the number of columns in a device. EPF81500A
devices use a 27-to-1 multiplexer; EPF81188A, EPF8820A, EPF8636A, and
EPF8452A devices use a 21-to-1 multiplexer; and EPF8282A and
EPF8282AV devices use a 13-to-1 multiplexer. Eight IOEs are connected to
each side of the row channels.
From Row or Column
Interconnect
Slew-Rate
Control
To Row or Column
Interconnect
I/O Controls
6
(6)
CLRN
DQ
Programmable
Inversion
CLR0
CLR1/OE0
CLK1/OE1
CLK0
(OE
[4..9])
OE2
OE3
VCC
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