參數(shù)資料
型號： EPF10K200S
英文描述： Programmable Logic
中文描述： 可編程邏輯
文件頁數(shù)： 72/138頁
文件大?。?/td> 2116K
代理商： EPF10K200S
Altera Corporation
39
FLEX 10K Embedded Programmable Logic Family Data Sheet
MultiVolt I/O Interface
The FLEX 10K device architecture supports the MultiVolt I/O interface
feature, which allows FLEX 10K devices to interface with systems of
differing supply voltages. These devices have one set of VCC pins for
internal operation and input buffers (VCCINT) and another set for I/O
output drivers (VCCIO).
Table 12 describes the FLEX 10K device supply voltages and MultiVolt
I/O support levels.
Power Sequencing & Hot-Socketing
Because FLEX 10K devices can be used in a multi-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. The VCCIO and VCCINT power planes can be powered in any
order.
Signals can be driven into FLEX 10KA devices before and during power
up without damaging the device. Additionally, FLEX 10KA devices do
not drive out during power up. Once operating conditions are reached,
FLEX 10KA devices operate as specified by the user.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
All FLEX 10K devices provide JTAG BST circuitry that complies with the
IEEE Std. 1149.1-1990 specification. All FLEX 10K devices can also be
configured using the JTAG pins through the BitBlaster serial download
cable, ByteBlaster parallel port download cable, or ByteBlasterMV parallel
port download cable, or via hardware that uses the JamTM programming
and test language. JTAG BST can be performed before or after
configuration, but not during configuration. FLEX 10K devices support
the JTAG instructions shown in Table 13.
Table 12. Supply Voltages & MultiVolt I/O Support Levels
Devices
Supply Voltage (V)
MultiVolt I/O Support Levels (V)
VCCINT
VCCIO
Input
Output
FLEX 10K
5.0
3.3 or 5.0
5.0
3.3
3.3 or 5.0
EPF10K50V
3.3
3.3 or 5.0
EPF10K130V
3.3
3.3 or 5.0
FLEX 10KA
3.3
2.5, 3.3, or 5.0
3.3 or 5.0
3.3
2.5
2.5, 3.3, or 5.0
2.5
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPF10K200SBC356-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200SBC356-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200SBC356-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200SBC356-2X 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200SBC356-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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