參數(shù)資料
型號: EPF10K100B
英文描述: Programmable Logic
中文描述: 可編程邏輯
文件頁數(shù): 136/138頁
文件大?。?/td> 2116K
代理商: EPF10K100B
Altera Corporation
97
FLEX 10K Embedded Programmable Logic Family Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 32 through 39 in this data sheet.
(2)
Using an LE to register the signal may provide a lower setup time.
(3)
This parameter is specified by characterization.
Tables 86 through 92 show EPF10K10A device internal and external
timing parameters.
Table 85. EPF10K130V Device External Bidirectional Timing Parameters
Symbol
Speed Grade
Unit
-2
-3
-4
Min
Max
Min
Max
Min
Max
tINSUBIDIR
6.7
8.5
10.8
ns
tINHBIDIR
0.0
ns
tOUTCOBIDIR
2.0
6.9
2.0
8.8
2.0
10.2
ns
tXZBIDIR
12.9
16.4
19.3
ns
tZXBIDIR
12.9
16.4
19.3
ns
Table 86. EPF10K10A Device LE Timing Microparameters (Part 1 of 2)
Symbol
Speed Grade
Unit
-1
-2
-3
Min
Max
Min
Max
Min
Max
tLUT
0.9
1.2
1.6
ns
tCLUT
1.2
1.4
1.9
ns
tRLUT
1.9
2.3
3.0
ns
tPACKED
0.6
0.7
0.9
ns
tEN
0.5
0.6
0.8
ns
tCICO
02
0.3
0.4
ns
tCGEN
0.7
0.9
1.1
ns
tCGENR
0.7
0.9
1.1
ns
tCASC
1.0
1.2
1.7
ns
tC
1.2
1.4
1.9
ns
tCO
0.5
0.6
0.8
ns
tCOMB
0.5
0.6
0.8
ns
tSU
1.1
1.3
1.7
ns
tH
0.6
0.7
0.9
ns
tPRE
0.5
0.6
0.9
ns
tCLR
0.5
0.6
0.9
ns
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