參數(shù)資料
型號： EP20K30E
廠商： Altera Corporation
英文描述： Programmable Logic Device Family
中文描述： 可編程邏輯器件系列
文件頁數(shù)： 7/117頁
文件大?。?/td> 570K
代理商： EP20K30E
Altera Corporation
7
APEX 20K Programmable Logic Device Family Data Sheet
Table 8. Comparison of APEX 20K & APEX 20KE Features
Feature
APEX 20K Devices
APEX 20KE Devices
MultiCore system integration
SignalTap logic analysis
32/64-Bit, 33-MHz PCI
Full support
Full support
Full compliance in -1, -2 speed
grades
Full support
Full support
Full compliance in -1, -2 speed grades
32/64-Bit, 66-MHz PCI
MultiVolt I/O
-
Full compliance in -1 speed grade
1.8-V, 2.5-V, or 3.3-V V
CCIO
V
CCIO
selected block-by-block
5.0-V tolerant with use of external resistor
Clock delay reduction
m
/(
n
×
v
) or
m
/(
n
×
k
) clock multiplication
Drive ClockLock output off-chip
External clock feedback
ClockShift
LVDS support
Up to four PLLs
ClockShift, clock phase adjustment
Eight
1.8-V, 2.5-V, 3.3-V, 5.0-V I/O
2.5-V I/O
3.3-V PCI and PCI-X
3.3-V Advanced Graphics Port (AGP)
Center tap terminated (CTT)
GTL+
LVCMOS
LVTTL
True-LVDS and LVPECL data pins
(in EP20K300E and larger devices)
LVDS and LVPECL signaling (in all BGA
and FineLine BGA devices)
LVDS and LVPECL data pins up to
156 Mbps (in -1 speed grade devices)
HSTL Class I
PCI-X
SSTL-2 Class I and II
SSTL-3 Class I and II
CAM
Dual-port RAM
FIFO
RAM
ROM
2.5-V or 3.3-V V
CCIO
V
CCIO
selected for device
Certain devices are 5.0-V tolerant
Clock delay reduction
2
×
and 4
×
clock multiplication
ClockLock support
Dedicated clock and input pins Six
I/O standard support
2.5-V, 3.3-V, 5.0-V I/O
3.3-V PCI
Low-voltage complementary
metal-oxide semiconductor
(LVCMOS)
Low-voltage transistor-to-transistor
logic (LVTTL)
Memory support
Dual-port RAM
FIFO
RAM
ROM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K30EFC144-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 192 Macro 93 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K30EFC144-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K30EFC144-1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 192 Macro 93 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K30EFC144-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 192 Macro 93 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K30EFC144-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 192 Macro 93 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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