參數(shù)資料
型號： EP1M120FC484-5
廠商： ALTERA CORP
元件分類： PLD
英文描述： LOADABLE PLD, PBGA484
封裝： 23 X 23 MM, 1 MM PITCH, FINE LINE, BGA-484
文件頁數(shù)： 5/84頁
文件大?。?/td> 936K
代理商： EP1M120FC484-5
Altera Corporation
13
Preliminary Information
Mercury Programmable Logic Device Family Data Sheet
Development
13
Tools
Notes to figure:
(1)
EP1M350 devices have 18 individual receiver and transmitter channels. EP1M120
devices have 8 individual receiver and transmitter channels.
(2)
W = 1 to 12, 14, 16, 18, or 20
J = 3 to 12, 14, 16, 18, or 20
W does not have to equal J.
(3)
This is one of four global clocks.
(4)
These clock pins drive HSDI PLLs only. They do not drive to the core.
(5)
Two recovered clocks can be driven to the core from receiver channels 4 and/or 5
in the EP1M120 device or receiver channels 9 and/or 10 in the EP1M350 device.
Logic &
Interconnect
Mercury device logic is implemented in LEs. LE resources are used
differently according to specific operating modes and the type of logic
function being implemented. LEs are grouped into LABs in a row-based
architecture. The multi-level FastTrack Interconnect structure provides
the routing connection between LEs, ESBs, and IOEs.
Logic Array Block
Each LAB consists of 10 LEs, LE carry chains, multiplier circuitry, LAB
control signals, local interconnect, and FastLUT connection lines. The
local interconnect transfers signals between LEs within the same or
adjacent LABs. FastLUT connections transfer the output of one LE to the
adjacent LE for ultra-fast sequential LE connections within the same LAB.
The Quartus II Compiler places associated logic within a LAB or adjacent
LABs, allowing the use of fast local and FastLUT connections for high
performance. Figure 5 shows the Mercury LAB structure.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1M350 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
EP1M350F780C5 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - MERCURY 1440 LABs 486 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1M350F780C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - MERCURY 1440 LABs 486 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1M350F780C7 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - MERCURY 1440 LABs 486 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1M350F780I6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - MERCURY 1440 LABs 486 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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