參數(shù)資料
型號(hào): EP1M120FC484-5
廠商: ALTERA CORP
元件分類: PLD
英文描述: LOADABLE PLD, PBGA484
封裝: 23 X 23 MM, 1 MM PITCH, FINE LINE, BGA-484
文件頁數(shù): 1/84頁
文件大?。?/td> 936K
代理商: EP1M120FC484-5
Altera Corporation
1
Mercury
Programmable Logic
Device Family
February 2001, ver. 1.1
Data Sheet
A-DS-MERCURY-01.1
Development
13
Tools
Features…
I
High-performance programmable logic device (PLD) family (see
Integrated high-speed transceivers with support for clock data
recovery (CDR) at up to 1.25 gigabits per second (Gbps)
Look-up table (LUT)-based architecture optimized for high
speed
Advanced interconnect structure for fast routing of critical paths
Enhanced I/O structure for versatile standards and interface
support
Up to 14,400 logic elements (LEs)
Preliminary
Information
I
System-level features
Up to four general-purpose phase-locked loops (PLLs) with
programmable multiplication and delay shifting
Up to 12 PLL output ports
Dedicated multiplier circuitry for high-speed implementation of
signed or unsigned multiplication up to 16
× 16
Embedded system blocks (ESBs) used to implement memory
functions including quad-port RAM, bidirectional dual-port
RAM, first-in first-out (FIFO) buffers, and content-addressable
memory (CAM)
Each ESB contains 4,096 bits and can be split and used as two
2,048-bit unidirectional dual-port RAM blocks
Note:
(1)
Each ESB can be used for two dual- or single-port RAM blocks.
Table 1. Mercury Device Features
Feature
EP1M120
EP1M350
Typical gates
120,000
350,000
HSDI channels
8
18
LEs
4,800
14,400
ESBs (1)
12
28
Maximum RAM bits
49,152
114,688
Maximum user I/O pins
303
486
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1M350 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
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