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參數(shù)資料
| 型號： | ELANSC300-25VI |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | 32位微控制器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 高度集成，低功耗，32位微控制器 |
| 文件頁數(shù)： | 68/139頁 |
| 文件大?。?/td> | 1388K |
| 代理商： | ELANSC300-25VI |
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68
élanSC300 Microcontroller Data Sheet
P R E L I M I N A R Y
ALTERNATE PIN FUNCTIONS
To provide the system designer with the most flexibility,
the élanSC300 microcontroller provides a means for
reconfiguring some of the pin functions, depending on
the system requirements. Reconfiguration of the
élanSC300 microcontroller pin functions is accom-
plished in one of two ways, depending on the pin func-
tions that are to be reconfigured. To select the internal
LCD controller, CPU local bus interface, or maximum
ISA bus interface, the state of the DTR and RTS pins
are sampled on the rising edge of the RESIN and
IORESET signals when power is first applied to the
élanSC300 microcontroller. This is shown in Figure 8.
After power has been initially applied and RESIN and
IORESET are deasserted, additional assertions of
IORESET while RESIN = 1 will not cause the pin con-
figurations to change. However, the pin configuration
inputs are always sampled in response to RESIN as-
sertions. Table 27 shows the pin states at reset to en-
able the three different pin configurations involving the
LCD controller, Local Bus, and Maximum ISA Bus.
The bus configuration selected can be read in bits 5–6
of the Memory Configuration 1 Register, Index 66h,
after the reset.
The second method of reconfiguring élanSC300 micro-
controller pin functions is accomplished by program-
ming the internal configuration registers. This method
is used to configure the following functions:
n
DRAM or SRAM main memory interface
n
Dual-scan LCD interface
n
Unidirectional or bidirectional parallel port
n
The clock source driving the X1OUT[BAUDOUT]
pin
n
PCMCIA memory commands
n
14.336-MHz clock
Table 27.
Bus Option Select Bit Logic
Bus Selected
Internal LCD
Local Bus
Full/Maximum ISA
DTR/CFG1
RTS/CFG0
0
0
1
0
X
1
VCC
RESIN and
IORESET
RTS
DTR
DTR and RTS sampled at
the rising edge of RESIN and IORESET
Notes:
This is shown to illustrate when CFG0 and CFG1 are sampled and is not intended to be used for reset timings. For reset timings,
refer to Table 51 on page 99
Figure 8.
Bus Option Configuration Select
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相關(guān)代理商/技術(shù)參數(shù) |
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| ELANSC300-33KC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33KI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: 制造商:AMD 功能描述: |
| ELANSC300-33VI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300WW WAF | 制造商:Advanced Micro Devices 功能描述: |
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