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參數(shù)資料
| 型號： | ELANSC300-25KI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, 25 MHz, MICROCONTROLLER, PQFP208 |
| 封裝： | SHRINK, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 97/139頁 |
| 文件大小： | 1388K |
| 代理商： | ELANSC300-25KI |
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élanSC300 Microcontroller Data Sheet
97
P R E L I M I N A R Y
LOOP FILTERS
Each of the Phase-Locked Loops (PLLs) in the
élanSC300 microcontroller requires an external Loop
Filter. Figure 30 describes each of the Loop Filters and
the recommended component values. The recom-
mended component values are shown in Table 50.
The system designer shall include the pads on the
printed circuit board to accommodate the future instal-
lation/change of C2 and R1. This is recommended be-
cause the PLL performance can be affected by the
physical circuit board design. In addition, future revi-
sions of the élanSC300 microcontroller with a modified
PLL design may require the addition of these compo-
nents to the system board.
The component value(s) of the Loop Filter directly af-
fect the acquisition (start up) time of the PLL circuit.
With the values recommended, the approximate acqui-
sition time is 200 ms. Therefore, the system designer
should program the Clock Control Register at Index
8Fh appropriately. Bits 0, 1, and 2 set the PLL restart
delay time. When the PLLs are shut off for any reason
(i.e., power management), the PLL will be allowed an
amount of time equal to that programmed in this regis-
ter to start up before the PLL outputs are enabled for
the internal device logic. A PLL restart delay time of
256 ms should be set in the Clock Control Register.
The pulse width of the RSTDRV signal is adjustable
based on the PLL start-up timing. See the timing spec-
ifications in Table 51 and Figure 32–Figure 35.
Table 10 on page 33 shows the pin characteristics for
the Loop Filters, including the reset voltage level of
each pin when RESIN is active.
For more information about Loop Filters, see the
Trou-
bleshooting Guide for Micro Power Off Mode on the
élan
TM
SC300 and ElanSC310 Microcontrollers and
Evaluation Boards Application Note,
order #21810.
Notes:
1. When the PLL is on, V
LFx
should be approximately be-
tween 1 V and 2 V.
Table 50.
Loop-Filter Component Values
LFx
R
1
0
0
0
0
C
1
C
2
1
2
3
4
0.47
μ
F
0.47
μ
F
0.47
μ
F
0.47
μ
F
Not Installed
Not Installed
Not Installed
Not Installed
LFx
R
1
C
1
C
2
Figure 30.
Loop-Filter Component
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