參數(shù)資料
型號(hào)： ELANSC300-25KI
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述： 32-BIT, 25 MHz, MICROCONTROLLER, PQFP208
封裝： SHRINK, PLASTIC, QFP-208
文件頁(yè)數(shù)： 46/139頁(yè)
文件大?。?/td> 1388K
代理商： ELANSC300-25KI
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46
élanSC300 Microcontroller Data Sheet
P R E L I M I N A R Y
Am386
SX/SXL/SXLV Data Sheet order #21020 and
the Am386
DX/DXL Data Sheet order #21017.
Along with standard 386 architectural features, the
CPU core includes SMM. SMM and the other features
of the CPU are described in the Am386DXLV and
Am386SXLV Microprocessors Technical Reference
Manual, order #16944.
Memory Controller
The élanSC300 microcontroller memory controller is a
unified control unit that supports a high-performance,
16-bit data path to DRAM or SRAM. No external mem-
ory bus buffers are required and up to 16 Mbyte in two
16-bit banks can be supported. System memory must
always be configured as 16-bits wide. For more infor-
mation about the memory controller, see Chapter 2 of
the élan
TM
SC300 Microcontroller Programmer’s Refer-
ence Manual
, order #18470. The System Block Dia-
gram, Figure 7 on page 64 of this manual, shows a
typical palm-top memory configuration.
The élanSC300 microcontroller’s memory controller
supports an EMS-compatible Memory Mapping Sys-
tem (MMS) with 12 page registers. This facility can be
used to provide access to ROM-based software. MMS
is also used in the PCMCIA slot support. Shadow RAM
is also supported.
The Memory Controller supports one of three different
memory operating modes: SRAM, Page mode DRAM,
or Enhanced Page mode DRAM. Enhanced Page
mode increases DRAM access performance by effec-
tively doubling the DRAM page size in a two-bank
DRAM system by arranging the address lines such that
one page is spread across both DRAM banks. Both
DRAM modes use standard Fast Page mode DRAMs.
The memory controller operation is synchronous with
respect to the CPU. This ensures maximum perfor-
mance for all transfers to local memory. The clock
stretching implemented by the clock generation cir-
cuitry works to reduce synchronous logic power con-
sumption.
As shown in Table 13, the two DRAM operating modes
are defined by the MOD field in the Memory Configura-
tion Register, Index 66h, bit 0.
The élanSC300 microcontroller defaults to a DRAM in-
terface. The SRAM mode is selected via bit 0 of the
Miscellaneous 6 Register Index 70h. The memory con-
troller provides for a direct connection of two 16-bit
banks supporting up to 16 Mbyte of DRAM, utilizing in-
dustry standard modules. The élanSC300 microcon-
troller shares the DRAM address lines MA0–MA11 with
the upper system address lines SA12–SA23 to reduce
pin count. This signal sharing is shown in Table 14.
The élanSC300 microcontroller also shares the DRAM
data bus with the system data bus on the D15–D0 pins.
In a typical system, an SD bus is created with an exter-
nal x 16 bit buffer or level translator to isolate the
DRAM data bus from the rest of the system. Refer to
the Typical System Block Diagram, Figure 7 on page
64 of this data sheet. The DRAM configurations are
supported as shown in Table 11. The bank size infor-
mation in the table also applies when system memory
is configured as SRAM; however, SRAM uses a differ-
ent addressing scheme than DRAM and shares the
same address lines as the ISA bus. Chapter 2 in the
élan
TM
SC300 Microcontroller Programmer’s Refer-
ence Manual
, order #18470, contains more informa-
tion. Note that the configurations that use 512 Kbyte x
8 bit and 1 Mbyte x 16 bit DRAMs employ asymmetrical
addressing. Table 16 and Table 17 show the relation-
ship of the CPU address mapped to the DRAM mem-
ory.
Table 13.
DRAM Mode Selection
MOD0 (Index 66h, bit 0)
0
1
Function
Page mode
Enhanced Page mode
Table 14.
MA and SA Signal Pin Sharing
System Address
SA23–SA14
SA13
SA12
DRAM Memory Address
MA9–MA0
MA10
MA11
相關(guān)PDF資料
PDF描述
ELANSC300-25VC Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-25VI Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-33VI Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC400-100AI Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ELANSC300-25VC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-25VI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-33KC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-33KI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller
ELANSC300-33VC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: 制造商:AMD 功能描述:
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