參數(shù)資料
型號(hào)： DSPA56720AG
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
中文描述： SymphonyTM DSP56720 / DSP56721多核音頻處理器
文件頁(yè)數(shù)： 26/54頁(yè)
文件大小： 671K
代理商： DSPA56720AG
Symphony
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
26
2.2.3
Programming the SHI I
2
C Serial Clock
The programmed serial clock cycle, T
I
control register).
2
CCP
, is specified by the value of the HDM[7:0] and HRS bits of the HCKR (SHI clock
The expression for T
I
2
CCP
is
T
I
2
CCP
= [T
C
×
2
×
(HDM[7:0] + 1)
×
(7
×
(1 – HRS) + 1)]
Eqn. 1
where
— HRS is the pre scaler rate select bit. When HRS is cleared, the fixed
divide-by-eight pre scaler is operational. When HRS is set, the pre scaler is bypassed.
— HDM[7:0] are the divider modulus select bits. A divide ratio from 1 to 256 (HDM[7:0] = $00 to $FF) may be
selected.
In I
2
C mode, the user may select a value for the programmed serial clock cycle from
6
×
T
C
(if HDM[7:0] = $02 and HRS = 1)
Eqn. 2
to
4096
×
T
C
(if HDM[7:0] = $FF and HRS = 0)
Eqn. 3
The programmed serial clock cycle (T
I
shown in Equation 4.
2
CCP
) should be chosen in order to achieve the desired SCL serial clock cycle (T
SCL
), as
T
I
2
CCP
+ 3
×
T
C
+ 45ns + T
R
(Nominal, SCL Serial Clock Cycle (TSCL) generated as master)
Eqn. 4
Figure 19. I
2
C Timing Diagram
44
46
49
48
50
51
53
52
45
58
55
56
61
47
60
57
59
SCL
SDA
HREQ
Stop
Start
MSB
LSB
ACK
Stop
相關(guān)PDF資料
PDF描述
DSPA56721AF SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPA56721AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56720AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56721AF SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56721AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSPA56721AF 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 200MHZ 200MIPS 80-PIN LQFP TRAY - Bulk
DSPA56721AG 制造商:Freescale Semiconductor 功能描述:AUD PROCESSOR 144LQFP - Bulk
DSPASMRM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP Assembler Reference Manual
DSPAUDIOEVMMB1 功能描述:開發(fā)板和工具包 - 其他處理器 DSP563XX MOTHER BOARD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DSPAUDIOEVMMB1E 功能描述:音頻 IC 開發(fā)工具 DSP563XX MOTHERBOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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