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參數(shù)資料
| 型號(hào)： | DSPA56720AG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| 中文描述： | SymphonyTM DSP56720 / DSP56721多核音頻處理器 |
| 文件頁(yè)數(shù)： | 25/54頁(yè) |
| 文件大?。?/td> | 671K |
| 代理商： | DSPA56720AG |
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Symphony
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
25
47
Start condition hold time
T
HD;STA
4.0
–
0.6
–
μ
s
48
SCL low period
T
LOW
4.7
–
1.3
–
μ
s
49
SCL high period
T
HIGH
4.0
–
1.3
–
μ
s
50
SCL and SDA rise time
T
R
T
F
–
5.0
–
5.0
ns
51
SCL and SDA fall time
–
5.0
–
5.0
ns
52
Data set-up time
T
SU;DAT
250
–
100
–
ns
53
Data hold time
T
HD;DAT
0.0
–
0.0
0.9
μ
s
54
DSP clock frequency
Filters bypassed
Very Narrow filters enabled
Narrow filters enabled
Wide filters enabled
F
OSC
10.6
10.6
11.8
13.1
–
–
–
–
28.5
28.5
39.7
61.0
–
–
–
–
MHz
MHz
MHz
MHz
55
SCL low to data out valid
T
VD;DAT
–
3.4
–
0.9
μ
s
56
Stop condition setup time
T
SU;STO
4.0
–
0.6
–
μ
s
57
HREQ in deassertion to last SCL edge
(HREQ in set-up time)
t
SU;RQI
0.0
–
0.0
–
ns
58
First SCL sampling edge to HREQ output
deassertion
2
Filters bypassed
Very Narrow filters enabled
Narrow filters enabled
Wide filters enabled
T
NG;RQO
4
×
T
C
+ 30
4
×
T
C
+ 50
4
×
T
C
+ 130
4
×
T
C
+ 230
–
–
–
–
50.0
70.0
250.0
150.0
–
–
–
–
50.0
70.0
150.0
250.0
ns
ns
ns
ns
59
Last SCL edge to HREQ output not
deasserted
2
Filters bypassed
Very Narrow filters enabled
Narrow filters enabled
Wide filters enabled
T
AS;RQO
2
×
T
C
+ 30
2
×
T
C
+ 40
2
×
T
C
+ 80
2
×
T
C
+ 130
40
50
90
140
–
–
–
–
40
50
90
140
–
–
–
–
ns
ns
ns
ns
60
HREQ in assertion to first SCL edge
Filters bypassed
Very Narrow filters enabled
Narrow filters enabled
Wide filters enabled
T
AS;RQI
4327
4317
4282
4227
–
–
–
–
927
917
877
827
–
–
–
–
ns
ns
ns
ns
61
First SCL edge to HREQ is not asserted
(HREQ in hold time.)
t
HO;RQI
0.0
–
0.0
–
ns
Notes:
1.
2.
3.
4.
5.
6.
V
CORE_VDD
= 1.00± 0.10 V; T
J
= -40°C to 125°C; C
L
= 50 pF.
Pull-up resistor: R
P
(min) = 1.5K Ohms.
Capacitive load: C
b
(max) = 50 pF.
All times assume noise free inputs.
All times assume internal clock frequency of 200 MHz.
SHI_1 specs match those of SHI.
Table 12. SHI I
2
C Protocol Timing Parameters (Continued)
Standard I
2
C
No.
Characteristics
1,2,3,4,5
Symbol/
Expression
Standard
Fast-Mode
Unit
Min
Max
Min
Max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSPA56721AF | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPA56721AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPB56720AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPB56721AF | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPB56721AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSPA56721AF | 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 200MHZ 200MIPS 80-PIN LQFP TRAY - Bulk |
| DSPA56721AG | 制造商:Freescale Semiconductor 功能描述:AUD PROCESSOR 144LQFP - Bulk |
| DSPASMRM | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DSP Assembler Reference Manual |
| DSPAUDIOEVMMB1 | 功能描述:開(kāi)發(fā)板和工具包 - 其他處理器 DSP563XX MOTHER BOARD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類(lèi)型:I2C, SPI, USB 工作電源電壓: |
| DSPAUDIOEVMMB1E | 功能描述:音頻 IC 開(kāi)發(fā)工具 DSP563XX MOTHERBOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
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