參數(shù)資料
型號： DSPA56720AG
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
中文描述： SymphonyTM DSP56720 / DSP56721多核音頻處理器
文件頁數(shù)： 14/54頁
文件大?。?/td> 671K
代理商： DSPA56720AG
Symphony
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
14
2.1.8
Reset, Stop, Mode Select, and Interrupt Timing
For reset, stop, mode select, and interrupt timing, see
Table 9
.
2
EXTAL input low
1
(40% to 60% duty cycle)
Crystal oscillator
Square wave input
Etl
16.67
2.5
100
inf
ns
3
EXTAL cycle time
With PLL disabled
With PLL enabled
Etc
5
33.3
inf
500
ns
4
Instruction cycle time
With PLL disabled
With PLL enabled
Tc
5.00
5.00
inf
5120
ns
Notes:
1.
2.
Measured at 50% of the input transition.
The indicated duty cycle is for the specified maximum frequency for which a part is rated. The minimum clock
high or low time required for correct operation, however, remains the same at lower operating frequencies;
therefore, when a lower clock frequency is used, the signal symmetry may vary from the specified duty cycle
as long as the minimum high time and low time requirements are met.
A valid clock signal must be applied to the EXTAL pin
within 3 ms
of the DSP56720/DSP56721 being
powered up.
3.
Table 9. Reset, Stop, Mode Select, and Interrupt Timing Parameters
No.
Characteristics
Expression
Min
Max
Unit
10
Delay from RESET assertion to all pins at reset value
3
–
–
11
ns
11
Required RESET duration
4
Power on, external clock generator, PLL disabled
Power on, external clock generator, PLL enabled
2 x T
C
2 x T
C
10
10
–
–
ns
ns
13
Syn reset deassert delay time
Minimum
2
×
T
C
10
–
ns
Maximum (PLL enabled)
(2 x T
C
) + T
LOCK
200
–
us
14
Mode select setup time
–
10.0
–
ns
15
Mode select hold time
–
10.0
–
ns
16
Minimum edge-triggered interrupt request assertion width
–
4
–
ns
17
Minimum edge-triggered interrupt request deassertion width
–
4
–
ns
18
Delay from interrupt trigger to interrupt code execution
10
×
T
C + 4
54
–
ns
Table 8. Clock Operation (Continued)
No.
Characteristics
Symbol
Min
Max
Units
相關(guān)PDF資料
PDF描述
DSPA56721AF SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPA56721AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56720AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56721AF SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
DSPB56721AG SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors
相關(guān)代理商/技術(shù)參數(shù)
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DSPA56721AG 制造商:Freescale Semiconductor 功能描述:AUD PROCESSOR 144LQFP - Bulk
DSPASMRM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP Assembler Reference Manual
DSPAUDIOEVMMB1 功能描述:開發(fā)板和工具包 - 其他處理器 DSP563XX MOTHER BOARD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DSPAUDIOEVMMB1E 功能描述:音頻 IC 開發(fā)工具 DSP563XX MOTHERBOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
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