參數(shù)資料
型號: DSP56F805FV80E
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 52/56頁
文件大小: 415K
代理商: DSP56F805FV80E
56F805
Technical Data, Rev. 15
52
Freescale Semiconductor
Because the processor’s output signals have fast rise and fall times, PCB trace lengths should be minimal.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the V
DD
and V
SS
circuits.
Take special care to minimize noise levels on the V
REF
, V
DDA
and V
SSA
pins.
Designs that utilize the TRST pin for JTAG port or OnCE module functionality (such as development or
debugging systems) should allow a means to assert TRST whenever RESET is asserted, as well as a means
to assert TRST independently of RESET. TRST must be asserted at power up for proper operation. Designs
that do not require debugging functionality, such as consumer products, TRST should be tied low.
TRST must be externally asserted even when the user relies on the internal power on reset for functional
test purposes.
Because the Flash memory is programmed through the JTAG/OnCE port, designers should provide an
interface to this port to allow in-circuit Flash programming.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
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DSP56F807EVM 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F807 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: