參數(shù)資料
型號(hào)： DSP56F801
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁(yè)數(shù)： 22/44頁(yè)
文件大?。?/td> 858K
代理商： DSP56F801
22
56F801 Technical Data
Figure 11. Connecting an External Clock Signal
Figure 12. External Clock Timing
3.5.4
An internal relaxation oscillator can supply the reference frequency when an external frequency source or
crystal are not used. During a 56F801 boot or reset sequence, the relaxation oscillator is enabled by default,
and the PRECS bit in the PLLCR word is set to 0 (
Section 3.5
). If an external oscillator is connected, the
relaxation oscillator can be deselected instead by setting the PRECS bit in the PLLCR to 1. When this
occurs, the PRECSS bit in the PLLSR (prescaler clock select status register) data word also sets to 1. If a
changeover between internal and external oscillators is required at startup, internal device circuits
compensate for any asynchronous transitions between the two clock signals so that no glitches occur in the
resulting master clock to the chip. When changing clocks, the user must ensure that the clock source is not
switched until the desired clock is enabled and stable.
Use of On-Chip Relaxation Oscillator
To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator
can be incrementally adjusted to within
±0.
25% of 8MHz by trimming an internal capacitor. Bits 0-7 of the
IOSCTL (internal oscillator control) word allow the user to set in an additional offset (trim) to this preset
value to increase or decrease capacitance. The default value of this trim is 128 units, making the power-up
default capacitor size 432 units. Each unit added or deleted changes the output frequency by about 0.2%,
allowing incremental adjustment until the desired frequency accuracy is achieved.
Table 21. External Clock Operation Timing Requirements
3
Operating Conditions:
V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, T
A
= –40
°
to +85
°
C
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of operation (external clock driver)
1
1.
2.
3.
4.
See
Figure 11
for details on using the recommended connection of an external clock driver.
May not exceed 60MHz for the DSP56F801FA60 device.
The high or low pulse width must be no smaller than 6.25ns or the chip will not function.
Parameters listed are guaranteed by design.
f
osc
0
—
80
2
MHz
Clock Pulse Width
3, 4
t
PW
6.25
—
—
ns
56F801
XTAL
EXTAL
External Clock
V
SS
External
Clock
V
IH
V
IL
Note: The midpoint is V
IL
+ (V
IH
– V
IL
)/2.
90%
50%
10%
90%
50%
10%
t
PW
t
PW
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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參數(shù)描述
DSP56F801-7UM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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DSP56F801EVM 功能描述:開(kāi)發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F801 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DSP56F801EVMUM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F801 Evaluation Module Hardware User＇s Manual
DSP56F801FA60 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 60Mhz/30MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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