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參數(shù)資料
| 型號(hào)： | DSP56721 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| 中文描述： | SymphonyTM DSP56720 / DSP56721多核音頻處理器 |
| 文件頁數(shù)： | 14/54頁 |
| 文件大?。?/td> | 671K |
| 代理商： | DSP56721 |
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Symphony
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
14
2.1.8
Reset, Stop, Mode Select, and Interrupt Timing
For reset, stop, mode select, and interrupt timing, see
Table 9
.
2
EXTAL input low
1
(40% to 60% duty cycle)
Crystal oscillator
Square wave input
Etl
16.67
2.5
100
inf
ns
3
EXTAL cycle time
With PLL disabled
With PLL enabled
Etc
5
33.3
inf
500
ns
4
Instruction cycle time
With PLL disabled
With PLL enabled
Tc
5.00
5.00
inf
5120
ns
Notes:
1.
2.
Measured at 50% of the input transition.
The indicated duty cycle is for the specified maximum frequency for which a part is rated. The minimum clock
high or low time required for correct operation, however, remains the same at lower operating frequencies;
therefore, when a lower clock frequency is used, the signal symmetry may vary from the specified duty cycle
as long as the minimum high time and low time requirements are met.
A valid clock signal must be applied to the EXTAL pin
within 3 ms
of the DSP56720/DSP56721 being
powered up.
3.
Table 9. Reset, Stop, Mode Select, and Interrupt Timing Parameters
No.
Characteristics
Expression
Min
Max
Unit
10
Delay from RESET assertion to all pins at reset value
3
–
–
11
ns
11
Required RESET duration
4
Power on, external clock generator, PLL disabled
Power on, external clock generator, PLL enabled
2 x T
C
2 x T
C
10
10
–
–
ns
ns
13
Syn reset deassert delay time
Minimum
2
×
T
C
10
–
ns
Maximum (PLL enabled)
(2 x T
C
) + T
LOCK
200
–
us
14
Mode select setup time
–
10.0
–
ns
15
Mode select hold time
–
10.0
–
ns
16
Minimum edge-triggered interrupt request assertion width
–
4
–
ns
17
Minimum edge-triggered interrupt request deassertion width
–
4
–
ns
18
Delay from interrupt trigger to interrupt code execution
10
×
T
C + 4
54
–
ns
Table 8. Clock Operation (Continued)
No.
Characteristics
Symbol
Min
Max
Units
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSPA56720AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPA56721AF | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPA56721AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPB56720AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPB56721AF | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56724 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Symphony? DSP56724/DSP56725 Multi-Core Audio Processors |
| DSP56725 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Symphony? DSP56724/DSP56725 Multi-Core Audio Processors |
| DSP56800 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor |
| DSP56800E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digitial Signal Controller |
| DSP56800EERM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
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