參數(shù)資料
型號: DS89C420-QCL
英文描述: Ultra-High-Speed Microcontroller
中文描述: 超高速微控制器
文件頁數(shù): 31/59頁
文件大?。?/td> 539K
代理商: DS89C420-QCL
DS89C420
31 of 59
Figure 9. Page Mode 1, External Data Memory Access (Pages = 01,
Stretch = 1, CD = 10)
ALE
PSEN
Port 0
Port 2
ALE
Port 0
Port 2
RD / WR
ALE
PSEN
Port 0
Port 2
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
LSB Addr
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Inst
Data
Data
MOVX
MOVX
MOVX
MSB Addr
MSB Addr
MSB Addr
Data
Memory Access (Stretch =1)
Memory Access (Stretch =1)
Memory Access (Stretch =1)
MOVX Instruction
MOVX Instruction
MOVX Instruction
MOVX Inst
Fetch
MOVX Inst
Fetch
XTAL1
PSEN
RD / WR
RD / WR
Figure 9 illustrates the external data-memory stretch cycle timing relationship when PAGEE = 1 and
PAGES1:PAGES0 = 01. The stretch cycle shown is for a stretch value of 1 and is coincident with a page
miss. Note that the first stretch value does not result in adding four system clocks to the
RD
/WR control
signals. This is because the first stretch uses one system clock to create additional setup and one system
clock to create additional hold time.
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