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參數(shù)資料
型號： DS3254DK
廠商： Maxim Integrated Products
文件頁數(shù)： 39/71頁
文件大小： 0K
描述： KIT DEMO FOR DS3254
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
設(shè)計資源： DS3254DK Gerber Files
標準包裝： 1
主要目的： 電信，線路接口單元（LIU）
已用 IC / 零件： DS3254
已供物品： 板，CD
DS3251/DS3252/DS3253/DS3254
44 of 71
17.
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Lead with Respect to VSS (except VDD)…………………………………………….-0.3V to +5.5V
Supply Voltage Range (VDD) with Respect to VSS…………………………………………………………..-0.3V to +3.63V
Ambient Operating Temperature Range……………………………………………………………………..-40°C to +85°C
Junction Operating Temperature Range……………………………………………………………………-40°C to +125°C
Storage Temperature Range………………………………………………………………………………...-55°C to +125°C
Soldering Temperature………………………………………………………….See IPC/JEDEC J-STD-020 Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device. Ambient operating temperature range
when device is mounted on a four-layer JEDEC test board with no airflow.
Note: The typical values listed in Tables 17-A through 17-J are not production tested.
Table 17-A. Recommended DC Operating Conditions
(TA = -40°C to +85°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDD
3.135
3.3
3.465
V
Logic 1, All Other Input Pins
VIH
2.0
5.5
V
Logic 0, All Other Input Pins
VIL
-0.3
+0.8
V
Table 17-B. DC Characteristics
(VDD = 3.3V ±5%, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DS3251
80
120
DS3252
150
200
DS3253
220
280
Supply Current (Note 1)
IDD
DS3254
290
360
mA
DS3251
60
100
DS3252
110
160
DS3253
160
220
Supply Current, Transmitters Tri-Stated
(All
TTSn Low) (Note 2)
IDDTTS
DS3254
210
280
mA
Power-Down Current (All TPD, RPD
Control Bits High)
IDDPD
DS325x
(Note 2)
35
50
mA
Lead Capacitance
CIO
7
10
pF
Input Leakage, All Other Input Pins
IIL
(Note 3)
-50
+10
A
Output Leakage (when High-Z)
ILO
(Note 3)
-10
+10
A
Output Voltage (IO = -4.0mA)
VOH
2.4
VDD
V
Output Voltage (IO = +4.0mA)
VOL
0
0.4
V
Note 1:
TCLKn = STMCLK = 51.84MHz; TXPn/TXNn driving all ones into 75
resistive loads; analog loopback enabled; all other inputs
at VDD or grounded; all other outputs open.
Note 2:
TCLKn = STMCLK = 51.84MHz; other inputs at VDD or grounded; digital outputs left open circuited.
Note 3:
0V < VIN < VDD for all other digital inputs.
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